@@ -353,6 +353,9 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt 1 */
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+#define M_MSR_TS0 (1ull << MSR_TS0)
+#define M_MSR_TS1 (1ull << MSR_TS1)
+#define M_MSR_TS (M_MSR_TS0 | M_MSR_TS1)
#define M_MSR_CM (1ull << MSR_CM)
#define M_MSR_GS (1ull << MSR_GS)
#define M_MSR_POW (1ull << MSR_POW)
@@ -486,7 +489,6 @@ typedef enum {
#else
#define msr_hv (0)
#endif
-#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
#define DBCR0_BRT (1 << 26)
@@ -973,7 +973,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
}
#ifdef TARGET_PPC64
- if (msr_ts) {
+ if (env->msr & M_MSR_TS) {
for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) {
kvm_set_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]);
}
@@ -1281,7 +1281,7 @@ int kvm_arch_get_registers(CPUState *cs)
}
#ifdef TARGET_PPC64
- if (msr_ts) {
+ if (env->msr & M_MSR_TS) {
for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) {
kvm_get_one_reg(cs, KVM_REG_PPC_TM_GPR(i), &env->tm_gpr[i]);
}
@@ -417,7 +417,7 @@ static bool tm_needed(void *opaque)
{
PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
- return msr_ts;
+ return env->msr & M_MSR_TS;
}
static const VMStateDescription vmstate_tm = {
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> --- target/ppc/cpu.h | 4 +++- target/ppc/kvm.c | 4 ++-- target/ppc/machine.c | 2 +- 3 files changed, 6 insertions(+), 4 deletions(-)