diff mbox series

[v4,20/22] target/ppc: Remove msr_de macro

Message ID 20220504210541.115256-21-victor.colombo@eldorado.org.br (mailing list archive)
State New, archived
Headers show
Series target/ppc: Remove hidden usages of *env | expand

Commit Message

Víctor Colombo May 4, 2022, 9:05 p.m. UTC
msr_de macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>

---

v4: Add this patch as an usage of msr_de was added in another patch
    https://patchew.org/QEMU/20220421011729.1148727-1-bmeng.cn@gmail.com/
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
---
 target/ppc/cpu.h         | 3 +--
 target/ppc/helper_regs.c | 4 ++--
 2 files changed, 3 insertions(+), 4 deletions(-)

Comments

Richard Henderson May 5, 2022, 3:28 p.m. UTC | #1
On 5/4/22 16:05, Víctor Colombo wrote:
> msr_de macro hides the usage of env->msr, which is a bad
> behavior. Substitute it with FIELD_EX64 calls that explicitly use
> env->msr as a parameter.
> 
> Suggested-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: Víctor Colombo<victor.colombo@eldorado.org.br>
> 
> ---
> 
> v4: Add this patch as an usage of msr_de was added in another patch
>      https://patchew.org/QEMU/20220421011729.1148727-1-bmeng.cn@gmail.com/
> Signed-off-by: Víctor Colombo<victor.colombo@eldorado.org.br>
> ---
>   target/ppc/cpu.h         | 3 +--
>   target/ppc/helper_regs.c | 4 ++--
>   2 files changed, 3 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 9f19b3c0a8..af249239d5 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -371,6 +371,7 @@  FIELD(MSR, PR, MSR_PR, 1)
 FIELD(MSR, FP, MSR_FP, 1)
 FIELD(MSR, ME, MSR_ME, 1)
 FIELD(MSR, FE0, MSR_FE0, 1)
+FIELD(MSR, DE, MSR_DE, 1)
 FIELD(MSR, FE1, MSR_FE1, 1)
 FIELD(MSR, EP, MSR_EP, 1)
 FIELD(MSR, IR, MSR_IR, 1)
@@ -495,8 +496,6 @@  FIELD(MSR, LE, MSR_LE, 1)
 #define HFSCR_MSGP     PPC_BIT(53) /* Privileged Message Send Facilities */
 #define HFSCR_IC_MSGP  0xA
 
-#define msr_de   ((env->msr >> MSR_DE)   & 1)
-
 #define DBCR0_ICMP (1 << 27)
 #define DBCR0_BRT (1 << 26)
 #define DBSR_ICMP (1 << 27)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 97cd263131..6159a15b7b 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -63,10 +63,10 @@  static uint32_t hreg_compute_hflags_value(CPUPPCState *env)
 
     if (ppc_flags & POWERPC_FLAG_DE) {
         target_ulong dbcr0 = env->spr[SPR_BOOKE_DBCR0];
-        if ((dbcr0 & DBCR0_ICMP) && msr_de) {
+        if ((dbcr0 & DBCR0_ICMP) && FIELD_EX64(env->msr, MSR, DE)) {
             hflags |= 1 << HFLAGS_SE;
         }
-        if ((dbcr0 & DBCR0_BRT) && msr_de) {
+        if ((dbcr0 & DBCR0_BRT) && FIELD_EX64(env->msr, MSR, DE)) {
             hflags |= 1 << HFLAGS_BE;
         }
     } else {