From patchwork Wed Jun 1 10:25:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaojuan Yang X-Patchwork-Id: 12866715 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59FC4C433F5 for ; Wed, 1 Jun 2022 10:58:02 +0000 (UTC) Received: from localhost ([::1]:44340 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nwM37-0008TA-AI for qemu-devel@archiver.kernel.org; Wed, 01 Jun 2022 06:58:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49738) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nwLYQ-00046Q-9U for qemu-devel@nongnu.org; Wed, 01 Jun 2022 06:26:18 -0400 Received: from mail.loongson.cn ([114.242.206.163]:40406 helo=loongson.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nwLYB-0000jw-Vf for qemu-devel@nongnu.org; Wed, 01 Jun 2022 06:26:17 -0400 Received: from localhost.localdomain (unknown [10.2.5.185]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Cxb+aGPpdibocLAA--.49716S41; Wed, 01 Jun 2022 18:25:47 +0800 (CST) From: Xiaojuan Yang To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, gaosong@loongson.cn, maobibo@loongson.cn, mst@redhat.com, imammedo@redhat.com, ani@anisinha.ca, mark.cave-ayland@ilande.co.uk Subject: [PATCH v6 39/43] hw/loongarch: Add LoongArch load elf function. Date: Wed, 1 Jun 2022 18:25:05 +0800 Message-Id: <20220601102509.985650-40-yangxiaojuan@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220601102509.985650-1-yangxiaojuan@loongson.cn> References: <20220601102509.985650-1-yangxiaojuan@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf9Cxb+aGPpdibocLAA--.49716S41 X-Coremail-Antispam: 1UD129KBjvJXoWxGryUJw1rJFW8WFyDGw4kZwb_yoWrAr4rpF 9xuryYgrW8JFnxAwn7W345urn8Aw48u3W3WFy7CrZYkrsrWryUZw18X347WFyj9aykWr1Y grZ8Xr4Yg3WUJrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: p1dqw5xldry3tdq6z05rqj20fqof0/ Received-SPF: pass client-ip=114.242.206.163; envelope-from=yangxiaojuan@loongson.cn; helo=loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao Reviewed-by: Richard Henderson --- hw/loongarch/loongson3.c | 61 ++++++++++++++++++++++++++++++++++++++-- target/loongarch/cpu.h | 2 ++ 2 files changed, 61 insertions(+), 2 deletions(-) diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c index 95984c9086..3c8fcb828c 100644 --- a/hw/loongarch/loongson3.c +++ b/hw/loongarch/loongson3.c @@ -19,6 +19,8 @@ #include "exec/address-spaces.h" #include "hw/irq.h" #include "net/net.h" +#include "hw/loader.h" +#include "elf.h" #include "hw/intc/loongarch_ipi.h" #include "hw/intc/loongarch_extioi.h" #include "hw/intc/loongarch_pch_pic.h" @@ -29,6 +31,36 @@ #include "target/loongarch/cpu.h" +static struct _loaderparams { + uint64_t ram_size; + const char *kernel_filename; +} loaderparams; + +static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr) +{ + return addr & 0x1fffffffll; +} + +static int64_t load_kernel_info(void) +{ + uint64_t kernel_entry, kernel_low, kernel_high; + ssize_t kernel_size; + + kernel_size = load_elf(loaderparams.kernel_filename, NULL, + cpu_loongarch_virt_to_phys, NULL, + &kernel_entry, &kernel_low, + &kernel_high, NULL, 0, + EM_LOONGARCH, 1, 0); + + if (kernel_size < 0) { + error_report("could not load kernel '%s': %s", + loaderparams.kernel_filename, + load_elf_strerror(kernel_size)); + exit(1); + } + return kernel_entry; +} + static void loongarch_devices_init(DeviceState *pch_pic) { DeviceState *gpex_dev; @@ -200,15 +232,29 @@ static void loongarch_irq_init(LoongArchMachineState *lams) loongarch_devices_init(pch_pic); } +static void reset_load_elf(void *opaque) +{ + LoongArchCPU *cpu = opaque; + CPULoongArchState *env = &cpu->env; + + cpu_reset(CPU(cpu)); + if (env->load_elf) { + cpu_set_pc(CPU(cpu), env->elf_address); + } +} + static void loongarch_init(MachineState *machine) { const char *cpu_model = machine->cpu_type; + const char *kernel_filename = machine->kernel_filename; ram_addr_t offset = 0; ram_addr_t ram_size = machine->ram_size; uint64_t highram_size = 0; MemoryRegion *address_space_mem = get_system_memory(); LoongArchMachineState *lams = LOONGARCH_MACHINE(machine); + LoongArchCPU *lacpu; int i; + int64_t kernel_addr = 0; if (!cpu_model) { cpu_model = LOONGARCH_CPU_TYPE_NAME("la464"); @@ -234,17 +280,28 @@ static void loongarch_init(MachineState *machine) machine->ram, 0, 256 * MiB); memory_region_add_subregion(address_space_mem, offset, &lams->lowmem); offset += 256 * MiB; - highram_size = ram_size - 256 * MiB; memory_region_init_alias(&lams->highmem, NULL, "loongarch.highmem", machine->ram, offset, highram_size); memory_region_add_subregion(address_space_mem, 0x90000000, &lams->highmem); - /* Add isa io region */ memory_region_init_alias(&lams->isa_io, NULL, "isa-io", get_system_io(), 0, LOONGARCH_ISA_IO_SIZE); memory_region_add_subregion(address_space_mem, LOONGARCH_ISA_IO_BASE, &lams->isa_io); + if (kernel_filename) { + loaderparams.ram_size = ram_size; + loaderparams.kernel_filename = kernel_filename; + kernel_addr = load_kernel_info(); + if (!machine->firmware) { + for (i = 0; i < machine->smp.cpus; i++) { + lacpu = LOONGARCH_CPU(qemu_get_cpu(i)); + lacpu->env.load_elf = true; + lacpu->env.elf_address = kernel_addr; + qemu_register_reset(reset_load_elf, lacpu); + } + } + } /* Initialize the IO interrupt subsystem */ loongarch_irq_init(lams); } diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 03cc96ee9b..71a5036c3c 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -308,6 +308,8 @@ typedef struct CPUArchState { AddressSpace address_space_iocsr; MemoryRegion system_iocsr; MemoryRegion iocsr_mem; + bool load_elf; + uint64_t elf_address; } CPULoongArchState; /**