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[217.237.121.196]) by smtp.gmail.com with ESMTPSA id f25-20020a170906139900b006fe8c831632sm3066160ejc.73.2022.06.03.11.51.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Jun 2022 11:51:07 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Marcel Apfelbaum , Richard Henderson , Eduardo Habkost , "Michael S. Tsirkin" , =?utf-8?q?Herv=C3=A9_Poussineau?= , Paolo Bonzini , Bernhard Beschow , Mark Cave-Ayland Subject: [PATCH v4 05/11] hw/isa/piix4: Factor out ISABus retrieval from piix4_create() Date: Fri, 3 Jun 2022 20:50:39 +0200 Message-Id: <20220603185045.143789-6-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220603185045.143789-1-shentey@gmail.com> References: <20220603185045.143789-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=shentey@gmail.com; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Modernizes the code. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé --- hw/isa/piix4.c | 6 +----- hw/mips/malta.c | 3 ++- include/hw/southbridge/piix.h | 2 +- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 058bebb5e2..96df21a610 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -312,7 +312,7 @@ static void piix4_register_types(void) type_init(piix4_register_types) -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus) { PCIDevice *pci; DeviceState *dev; @@ -322,10 +322,6 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) TYPE_PIIX4_PCI_DEVICE); dev = DEVICE(pci); - if (isa_bus) { - *isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0")); - } - if (smbus) { pci = pci_new(devfn + 3, TYPE_PIIX4_PM); qdev_prop_set_uint32(DEVICE(pci), "smb_io_base", 0x1100); diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9ffdc5b8f1..e446b25ad0 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1399,7 +1399,8 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); /* Southbridge */ - dev = piix4_create(pci_bus, &isa_bus, &smbus); + dev = piix4_create(pci_bus, &smbus); + isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0")); /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 3b97186f75..dab5c9704e 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -70,6 +70,6 @@ DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus); +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus); #endif