@@ -198,10 +198,11 @@ static void pc_init1(MachineState *machine,
gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
if (pcmc->pci_enabled) {
- PIIX3State *piix3;
+ DeviceState *dev;
PCIDevice *pci_dev;
const char *type = xen_enabled() ? TYPE_PIIX3_XEN_DEVICE
: TYPE_PIIX3_DEVICE;
+ int i;
pci_bus = i440fx_init(host_type,
pci_type,
@@ -221,10 +222,12 @@ static void pc_init1(MachineState *machine,
x86_machine_is_smm_enabled(x86ms),
&error_abort);
pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
- piix3 = PIIX3_PCI_DEVICE(pci_dev);
- piix3->pic = x86ms->gsi;
- piix3_devfn = piix3->dev.devfn;
- isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0"));
+ dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "pic"));
+ for (i = 0; i < ISA_NUM_IRQS; ++i) {
+ qdev_connect_gpio_out(dev, i, x86ms->gsi[i]);
+ }
+ piix3_devfn = pci_dev->devfn;
+ isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
"rtc"));
piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
@@ -233,6 +236,7 @@ static void pc_init1(MachineState *machine,
piix4_pm = NULL;
isa_bus = isa_bus_new(NULL, get_system_memory(), system_io,
&error_abort);
+ isa_bus_irqs(isa_bus, x86ms->gsi);
rtc_state = isa_new(TYPE_MC146818_RTC);
qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000);
@@ -241,7 +245,6 @@ static void pc_init1(MachineState *machine,
i8257_dma_init(isa_bus, 0);
pcms->hpet_enabled = false;
}
- isa_bus_irqs(isa_bus, x86ms->gsi);
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
@@ -41,7 +41,7 @@
static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq)
{
- qemu_set_irq(piix3->pic[pic_irq],
+ qemu_set_irq(piix3->pic.in_irqs[pic_irq],
!!(piix3->pic_levels &
(((1ULL << PIIX_NUM_PIRQS) - 1) <<
(pic_irq * PIIX_NUM_PIRQS))));
@@ -306,6 +306,13 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
return;
}
+ /* PIC */
+ if (!qdev_realize(DEVICE(&d->pic), BUS(isa_bus), errp)) {
+ return;
+ }
+
+ isa_bus_irqs(isa_bus, d->pic.in_irqs);
+
memory_region_init_io(&d->rcr_mem, OBJECT(dev), &rcr_ops, d,
"piix3-reset-control", 1);
memory_region_add_subregion_overlap(pci_address_space_io(dev),
@@ -359,6 +366,7 @@ static void pci_piix3_init(Object *obj)
{
PIIX3State *d = PIIX3_PCI_DEVICE(obj);
+ object_initialize_child(obj, "pic", &d->pic, TYPE_ISA_PIC);
object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC);
object_initialize_child(obj, "uhci", &d->uhci, "piix3-usb-uhci");
@@ -15,6 +15,7 @@
#include "hw/pci/pci.h"
#include "qom/object.h"
#include "hw/acpi/piix4.h"
+#include "hw/intc/i8259.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/usb/hcd-uhci.h"
@@ -50,11 +51,10 @@ struct PIIXState {
#endif
uint64_t pic_levels;
- qemu_irq *pic;
-
/* This member isn't used. Just for save/load compatibility */
int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
+ ISAPICState pic;
RTCState rtc;
UHCIState uhci;
PIIX4PMState pm;
Use the newly introduced i8259 proxy "isa-pic" which allows for wiring up devices in the southbridge where the virtualization technology used (KVM, TCG, Xen) is not yet known. Signed-off-by: Bernhard Beschow <shentey@gmail.com> --- hw/i386/pc_piix.c | 15 +++++++++------ hw/isa/piix3.c | 10 +++++++++- include/hw/southbridge/piix.h | 4 ++-- 3 files changed, 20 insertions(+), 9 deletions(-)