diff mbox series

[v1] target/loongarch/cpu: Fix cpucfg default value

Message ID 20220715064829.1521482-1-yangxiaojuan@loongson.cn (mailing list archive)
State New, archived
Headers show
Series [v1] target/loongarch/cpu: Fix cpucfg default value | expand

Commit Message

Xiaojuan Yang July 15, 2022, 6:48 a.m. UTC
We should config cpucfg[20] to set value for the scache's ways, sets,
and size arguments when loongarch cpu init. However, the old code
wirte 'sets argument' twice, so we change one of them to 'size argument'.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
 target/loongarch/cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson July 19, 2022, 5:35 a.m. UTC | #1
On 7/15/22 12:18, Xiaojuan Yang wrote:
> We should config cpucfg[20] to set value for the scache's ways, sets,
> and size arguments when loongarch cpu init. However, the old code
> wirte 'sets argument' twice, so we change one of them to 'size argument'.
> 
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> ---
>   target/loongarch/cpu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 89ea971cde..4cfce8c9d2 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -406,7 +406,7 @@ static void loongarch_la464_initfn(Object *obj)
>       data = 0;
>       data = FIELD_DP32(data, CPUCFG20, L3IU_WAYS, 15);
>       data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 14);
> -    data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 6);
> +    data = FIELD_DP32(data, CPUCFG20, L3IU_SIZE, 6);

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

>       env->cpucfg[20] = data;
>   
>       env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
Richard Henderson July 19, 2022, 7:02 a.m. UTC | #2
On 7/15/22 12:18, Xiaojuan Yang wrote:
> We should config cpucfg[20] to set value for the scache's ways, sets,
> and size arguments when loongarch cpu init. However, the old code
> wirte 'sets argument' twice, so we change one of them to 'size argument'.
> 
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>

Queued.


r~

> ---
>   target/loongarch/cpu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
> index 89ea971cde..4cfce8c9d2 100644
> --- a/target/loongarch/cpu.c
> +++ b/target/loongarch/cpu.c
> @@ -406,7 +406,7 @@ static void loongarch_la464_initfn(Object *obj)
>       data = 0;
>       data = FIELD_DP32(data, CPUCFG20, L3IU_WAYS, 15);
>       data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 14);
> -    data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 6);
> +    data = FIELD_DP32(data, CPUCFG20, L3IU_SIZE, 6);
>       env->cpucfg[20] = data;
>   
>       env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
diff mbox series

Patch

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 89ea971cde..4cfce8c9d2 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -406,7 +406,7 @@  static void loongarch_la464_initfn(Object *obj)
     data = 0;
     data = FIELD_DP32(data, CPUCFG20, L3IU_WAYS, 15);
     data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 14);
-    data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 6);
+    data = FIELD_DP32(data, CPUCFG20, L3IU_SIZE, 6);
     env->cpucfg[20] = data;
 
     env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);