diff mbox series

[v2,2/2] tests/tcg/ppc64le: Added an underflow with UE=1 test

Message ID 20220818184420.368154-2-lucas.araujo@eldorado.org.br (mailing list archive)
State New, archived
Headers show
Series [v2,1/2] tests/tcg/ppc64le: Added an overflow with OE=1 test | expand

Commit Message

Lucas Mateus Martins Araujo e Castro Aug. 18, 2022, 6:44 p.m. UTC
Added a test to see if the adjustment is being made correctly when an
underflow occurs and UE is set.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
---
This patch will also fail without the underflow with UE set bugfix
Message-Id:<20220805141522.412864-3-lucas.araujo@eldorado.org.br>
---
 tests/tcg/ppc64/Makefile.target   |  1 +
 tests/tcg/ppc64le/Makefile.target |  1 +
 tests/tcg/ppc64le/ue_excp.c       | 53 +++++++++++++++++++++++++++++++
 3 files changed, 55 insertions(+)
 create mode 100644 tests/tcg/ppc64le/ue_excp.c
diff mbox series

Patch

diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target
index 43958ad87b..583677031b 100644
--- a/tests/tcg/ppc64/Makefile.target
+++ b/tests/tcg/ppc64/Makefile.target
@@ -30,5 +30,6 @@  run-plugin-sha512-vector-with-%: QEMU_OPTS+=-cpu POWER10
 PPC64_TESTS += signal_save_restore_xer
 PPC64_TESTS += xxspltw
 PPC64_TESTS += oe_excp
+PPC64_TESTS += ue_excp
 
 TESTS += $(PPC64_TESTS)
diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target
index 8d11ac731d..b9e689c582 100644
--- a/tests/tcg/ppc64le/Makefile.target
+++ b/tests/tcg/ppc64le/Makefile.target
@@ -28,5 +28,6 @@  PPC64LE_TESTS += mffsce
 PPC64LE_TESTS += signal_save_restore_xer
 PPC64LE_TESTS += xxspltw
 PPC64LE_TESTS += oe_excp
+PPC64LE_TESTS += ue_excp
 
 TESTS += $(PPC64LE_TESTS)
diff --git a/tests/tcg/ppc64le/ue_excp.c b/tests/tcg/ppc64le/ue_excp.c
new file mode 100644
index 0000000000..028ef3bbc7
--- /dev/null
+++ b/tests/tcg/ppc64le/ue_excp.c
@@ -0,0 +1,53 @@ 
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/prctl.h>
+#include <signal.h>
+#include <ucontext.h>
+#include <stdint.h>
+
+#define FP_UE (1ull << 5)
+#define MTFSF(FLM, FRB) asm volatile ("mtfsf %0, %1" :: "i" (FLM), "f" (FRB))
+
+void sigfpe_handler(int sig, siginfo_t *si, void *ucontext)
+{
+    union {
+        uint64_t ll;
+        double dp;
+    } r;
+    uint64_t ch = 0x1b64f1c1b0000000ull;
+    r.dp = ((ucontext_t *)ucontext)->uc_mcontext.fp_regs[2];
+    if (r.ll == ch) {
+        exit(0);
+    }
+    fprintf(stderr, "expected result: %lx\n         result: %lx\n", ch, r.ll);
+    exit(1);
+}
+
+int main()
+{
+    uint64_t fpscr;
+    uint64_t a = 0x00005ca8ull;
+    uint64_t b = 0x00001cefull;
+
+    struct sigaction sa = {
+        .sa_sigaction = sigfpe_handler,
+        .sa_flags = SA_SIGINFO
+    };
+
+    prctl(PR_SET_FPEXC, PR_FP_EXC_PRECISE);
+    sigaction(SIGFPE, &sa, NULL);
+
+    fpscr = FP_UE;
+    MTFSF(0b11111111, fpscr);
+
+    asm (
+        "lfd 0, %0\n\t"
+        "lfd 1, %1\n\t"
+        "fmul 2, 0, 1\n\t"
+        :
+        : "m"(a), "m"(b)
+        : "memory", "fr0", "fr1", "fr2"
+    );
+
+    abort();
+}