diff mbox series

[v2,2/3] hw/intc: Fix LoongArch extioi function

Message ID 20220927061225.3566554-3-yangxiaojuan@loongson.cn (mailing list archive)
State New, archived
Headers show
Series Add memmap and fix bugs for LoongArch | expand

Commit Message

Xiaojuan Yang Sept. 27, 2022, 6:12 a.m. UTC 
1.When cpu read or write extioi COREISR reg, it should access
the reg belonged to itself, so the index of 's->coreisr' is
current cpu number.
2.Remove the unused extioi system memory region and we only
support the extioi iocsr memory region now.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
 hw/intc/loongarch_extioi.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

Comments

Richard Henderson Sept. 29, 2022, 2:38 a.m. UTC | #1 
On 9/26/22 23:12, Xiaojuan Yang wrote:
> 1.When cpu read or write extioi COREISR reg, it should access
> the reg belonged to itself, so the index of 's->coreisr' is
> current cpu number.
> 2.Remove the unused extioi system memory region and we only
> support the extioi iocsr memory region now.
> 
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> ---
>   hw/intc/loongarch_extioi.c | 17 ++++++++++-------
>   1 file changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
> index 22803969bc..b89ec2e2a6 100644
> --- a/hw/intc/loongarch_extioi.c
> +++ b/hw/intc/loongarch_extioi.c
> @@ -17,6 +17,12 @@
>   #include "migration/vmstate.h"
>   #include "trace.h"
>   
> +static inline int get_current_cpu(void)
> +{
> +    int cpu_id = current_cpu ? current_cpu->cpu_index : 0;
> +
> +    return cpu_id;
> +}

I wouldn't want to introduce another instance of current_cpu right now.  Please see Alex's 
work to remove this from Arm hardware.

https://lore.kernel.org/qemu-devel/20220927141504.3886314-1-alex.bennee@linaro.org/


r~

>   
>   static void extioi_update_irq(LoongArchExtIOI *s, int irq, int level)
>   {
> @@ -92,8 +98,8 @@ static uint64_t extioi_readw(void *opaque, hwaddr addr, unsigned size)
>           ret = s->bounce[index];
>           break;
>       case EXTIOI_COREISR_START ... EXTIOI_COREISR_END - 1:
> -        index = ((offset - EXTIOI_COREISR_START) & 0x1f) >> 2;
> -        cpu = ((offset - EXTIOI_COREISR_START) >> 8) & 0x3;
> +        index = (offset - EXTIOI_COREISR_START) >> 2;
> +        cpu = get_current_cpu();
>           ret = s->coreisr[cpu][index];
>           break;
>       case EXTIOI_COREMAP_START ... EXTIOI_COREMAP_END - 1:
> @@ -183,8 +189,8 @@ static void extioi_writew(void *opaque, hwaddr addr,
>           s->bounce[index] = val;
>           break;
>       case EXTIOI_COREISR_START ... EXTIOI_COREISR_END - 1:
> -        index = ((offset - EXTIOI_COREISR_START) & 0x1f) >> 2;
> -        cpu = ((offset - EXTIOI_COREISR_START) >> 8) & 0x3;
> +        index = (offset - EXTIOI_COREISR_START) >> 2;
> +        cpu = get_current_cpu();
>           old_data = s->coreisr[cpu][index];
>           s->coreisr[cpu][index] = old_data & ~val;
>           /* write 1 to clear interrrupt */
> @@ -284,9 +290,6 @@ static void loongarch_extioi_instance_init(Object *obj)
>               qdev_init_gpio_out(DEVICE(obj), &s->parent_irq[cpu][pin], 1);
>           }
>       }
> -    memory_region_init_io(&s->extioi_system_mem, OBJECT(s), &extioi_ops,
> -                          s, "extioi_system_mem", 0x900);
> -    sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->extioi_system_mem);
>   }
>   
>   static void loongarch_extioi_class_init(ObjectClass *klass, void *data)
diff mbox series

Patch

diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index 22803969bc..b89ec2e2a6 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -17,6 +17,12 @@ 
 #include "migration/vmstate.h"
 #include "trace.h"
 
+static inline int get_current_cpu(void)
+{
+    int cpu_id = current_cpu ? current_cpu->cpu_index : 0;
+
+    return cpu_id;
+}
 
 static void extioi_update_irq(LoongArchExtIOI *s, int irq, int level)
 {
@@ -92,8 +98,8 @@  static uint64_t extioi_readw(void *opaque, hwaddr addr, unsigned size)
         ret = s->bounce[index];
         break;
     case EXTIOI_COREISR_START ... EXTIOI_COREISR_END - 1:
-        index = ((offset - EXTIOI_COREISR_START) & 0x1f) >> 2;
-        cpu = ((offset - EXTIOI_COREISR_START) >> 8) & 0x3;
+        index = (offset - EXTIOI_COREISR_START) >> 2;
+        cpu = get_current_cpu();
         ret = s->coreisr[cpu][index];
         break;
     case EXTIOI_COREMAP_START ... EXTIOI_COREMAP_END - 1:
@@ -183,8 +189,8 @@  static void extioi_writew(void *opaque, hwaddr addr,
         s->bounce[index] = val;
         break;
     case EXTIOI_COREISR_START ... EXTIOI_COREISR_END - 1:
-        index = ((offset - EXTIOI_COREISR_START) & 0x1f) >> 2;
-        cpu = ((offset - EXTIOI_COREISR_START) >> 8) & 0x3;
+        index = (offset - EXTIOI_COREISR_START) >> 2;
+        cpu = get_current_cpu();
         old_data = s->coreisr[cpu][index];
         s->coreisr[cpu][index] = old_data & ~val;
         /* write 1 to clear interrrupt */
@@ -284,9 +290,6 @@  static void loongarch_extioi_instance_init(Object *obj)
             qdev_init_gpio_out(DEVICE(obj), &s->parent_irq[cpu][pin], 1);
         }
     }
-    memory_region_init_io(&s->extioi_system_mem, OBJECT(s), &extioi_ops,
-                          s, "extioi_system_mem", 0x900);
-    sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->extioi_system_mem);
 }
 
 static void loongarch_extioi_class_init(ObjectClass *klass, void *data)