From patchwork Fri Sep 30 01:23:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Weiwei Li X-Patchwork-Id: 12994818 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA6A8C433FE for ; Fri, 30 Sep 2022 01:28:55 +0000 (UTC) Received: from localhost ([::1]:42496 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oe4pi-0000jr-Rc for qemu-devel@archiver.kernel.org; Thu, 29 Sep 2022 21:28:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53796) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oe4le-0001re-VO; Thu, 29 Sep 2022 21:24:43 -0400 Received: from smtp84.cstnet.cn ([159.226.251.84]:39480 helo=cstnet.cn) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oe4la-00080l-8Y; Thu, 29 Sep 2022 21:24:42 -0400 Received: from localhost.localdomain (unknown [139.227.114.201]) by APP-05 (Coremail) with SMTP id zQCowABHOHVJRTZjaraNAg--.3616S3; Fri, 30 Sep 2022 09:24:27 +0800 (CST) From: Weiwei Li To: palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org, qemu-devel@nongnu.org Cc: wangjunqiang@iscas.ac.cn, lazyparser@gmail.com, Weiwei Li Subject: [RFC 1/8] target/riscv: add cfg properties for Zc* extension Date: Fri, 30 Sep 2022 09:23:38 +0800 Message-Id: <20220930012345.5248-2-liweiwei@iscas.ac.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220930012345.5248-1-liweiwei@iscas.ac.cn> References: <20220930012345.5248-1-liweiwei@iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: zQCowABHOHVJRTZjaraNAg--.3616S3 X-Coremail-Antispam: 1UD129KBjvJXoW7KFy7CF1kWr18trWDJF1kXwb_yoW8Aw45pr 4rG3yYkrWDXry7Ca1fJF1UW3Z5Wwn7CayIg392g3WxWrW3ArW3XFnYkw1UWF43JF4rJF4a 9F1UCFy5Cr47JFDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9K14x267AKxVW5JVWrJwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_Jr4l82xGYIkIc2 x26xkF7I0E14v26r1I6r4UM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F4UJw A2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWx Jr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2I x0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8 JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1l42xK82IYc2Ij64vIr4 1l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK 67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI 8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAv wI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14 v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfU5SoXUUUUU X-Originating-IP: [139.227.114.201] X-CM-SenderInfo: 5olzvxxzhlqxpvfd2hldfou0/ Received-SPF: pass client-ip=159.226.251.84; envelope-from=liweiwei@iscas.ac.cn; helo=cstnet.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add properties for Zca,Zcb,Zcf,Zcd,Zcmp,Zcmt extension Add check for these properties Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 24 ++++++++++++++++++++++++ target/riscv/cpu.h | 6 ++++++ 2 files changed, 30 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index b29c88b9f0..7da3de1725 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -782,6 +782,30 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } } + if (env->misa_mxl_max != MXL_RV32 && cpu->cfg.ext_zcf) { + error_setg(errp, "Zcf is only relevant to RV32"); + return; + } + + if ((cpu->cfg.ext_zcf || cpu->cfg.ext_zcd || cpu->cfg.ext_zcb || + cpu->cfg.ext_zcmp || cpu->cfg.ext_zcmt) && !cpu->cfg.ext_zca) { + error_setg(errp, "Zcf/Zcd/Zcb/Zcmp/Zcmt require Zca extension"); + return; + } + + if ((((env->misa_ext & RVD) && (env->misa_ext & RVC)) || + cpu->cfg.ext_zcd) && (cpu->cfg.ext_zcmp || cpu->cfg.ext_zcmt)) { + error_setg(errp, + "Zcmp/Zcmt are incompatible with Zcd, which is " + "included when C and D extensions are both present"); + return; + } + + if (cpu->cfg.ext_zcmt && !cpu->cfg.ext_icsr) { + error_setg(errp, "Zcmt extension requires Zicsr"); + return; + } + if (cpu->cfg.ext_zk) { cpu->cfg.ext_zkn = true; cpu->cfg.ext_zkr = true; diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index b131fa8c8e..db3eca1d8a 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -428,6 +428,12 @@ struct RISCVCPUConfig { bool ext_zbkc; bool ext_zbkx; bool ext_zbs; + bool ext_zca; + bool ext_zcb; + bool ext_zcd; + bool ext_zcf; + bool ext_zcmp; + bool ext_zcmt; bool ext_zk; bool ext_zkn; bool ext_zknd;