From patchwork Fri Oct 28 12:26:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13023562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5927ECAAA1 for ; Fri, 28 Oct 2022 12:32:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ooOXc-0005h8-JJ; Fri, 28 Oct 2022 08:32:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ooOSr-0003OP-Ux for qemu-devel@nongnu.org; Fri, 28 Oct 2022 08:27:57 -0400 Received: from mail-pj1-x1033.google.com ([2607:f8b0:4864:20::1033]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ooOSp-0003Nb-9T for qemu-devel@nongnu.org; Fri, 28 Oct 2022 08:27:57 -0400 Received: by mail-pj1-x1033.google.com with SMTP id m6-20020a17090a5a4600b00212f8dffec9so4369411pji.0 for ; Fri, 28 Oct 2022 05:27:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+9Hvu5m8f5nzPBzUo9RBA72FD6lUa6YAEOOW8pwxlMM=; b=CPrL1cDH9Ao9SCvyQRVDaKcXbL8t32WNFQU8XXqh+8rvh6L0kLhXqaQaTFXKGVv0iF i6lfvhO6bR3//ndDFjF2Bw/nug88zdLfdR1GKMwayz5cctHQjGWt7c6JMlLLO8MtAQlc 2moaJO3mc9kq1W+DyzHDJ8VY46IFUtZ+JJfYKH89s9RUYhvHs0io8tLm9yAR5HHNxxL9 iwwY3FHev0YBbFr+imR0iCdVqs7HYGmZbGWnwUD7+DJkr82Bz5XRVgIn8aV27RWxlyyU kLDxxpTR7qBk1e67rXTZN97RSjKbtXzMLVk89fNfwMzsgP6IWz30GjohZ9+yMVlo1Pf6 bGcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+9Hvu5m8f5nzPBzUo9RBA72FD6lUa6YAEOOW8pwxlMM=; b=npm85N4aetiFBPgjWu3OesskJrOZ3yIAxfVIiXxt5+Lmbt6fRwiV3RSD8m+j8ldIr9 qcSpoveQ2MxK+XJbiLAn+hFqbK3lKtsNofCj60y+ewtNKVGW4QEmCdhLvvtNzXB7e37B qVkqmzNNEGExP2rpIZuXp86Cv1QNzwLQ7MskDW93K21UIvLsnz3T52gmoc9M2ikwuFcM fsLuTPgVJRLuHmS9mlBtBKxInVuUnoXAk1fAhJa82y3WNDa/AayNaf/w00bmT9pdal2S 8p2mgdsLCaEpyJnYIBHFAgDH4AzPKKyy5hf7Ik/yj0CtUpwS+T1R2I/K1NtwnOTUDs5p rXgg== X-Gm-Message-State: ACrzQf1xN1dkKmL5+3WjOp50jN8BEBJslt2uvdoJMPjRODaSMCKn7a+N miROFRAqv8iYK3dDos3fHlwCxw== X-Google-Smtp-Source: AMsMyM4+LQycwMtHDwJkaTELtDgHqP78UCpgbt1Wv+rvNkMJPz/9bRoQGmNqv3SSgIRHTQ1pgRDIDw== X-Received: by 2002:a17:90b:4c87:b0:213:5fe0:6700 with SMTP id my7-20020a17090b4c8700b002135fe06700mr13557398pjb.128.1666960074609; Fri, 28 Oct 2022 05:27:54 -0700 (PDT) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id x3-20020a170902ec8300b00174d9bbeda4sm2948456plg.197.2022.10.28.05.27.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Oct 2022 05:27:54 -0700 (PDT) From: Akihiko Odaki To: Cc: Alex Williamson , qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, "Michael S . Tsirkin" , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Richard Henderson , Eduardo Habkost , John Snow , Dmitry Fleytman , Jason Wang , Stefan Weil , Keith Busch , Klaus Jensen , Peter Maydell , Andrey Smirnov , Paul Burton , Aleksandar Rikalo , Yan Vugenfirer , Yuri Benditovich , Akihiko Odaki Subject: [PATCH v5 14/17] hw/pci-bridge/pcie_pci_bridge: Omit errp for pci_add_capability Date: Fri, 28 Oct 2022 21:26:26 +0900 Message-Id: <20221028122629.3269-15-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221028122629.3269-1-akihiko.odaki@daynix.com> References: <20221028122629.3269-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Received-SPF: none client-ip=2607:f8b0:4864:20::1033; envelope-from=akihiko.odaki@daynix.com; helo=mail-pj1-x1033.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Omitting errp for pci_add_capability() causes it to abort if capabilities overlap. This behavior is appropriate heare because all of the capabilities set in this device are defined in the program and their overlap should not happen unless there is a programming error. Signed-off-by: Akihiko Odaki --- hw/pci-bridge/pcie_pci_bridge.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index 99778e3e24..1b839465e7 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -35,7 +35,7 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) { PCIBridge *br = PCI_BRIDGE(d); PCIEPCIBridge *pcie_br = PCIE_PCI_BRIDGE_DEV(d); - int rc, pos; + int rc; pci_bridge_initfn(d, TYPE_PCI_BUS); @@ -49,12 +49,8 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) pcie_cap_init(d, 0, PCI_EXP_TYPE_PCI_BRIDGE, 0); - pos = pci_add_capability(d, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF, errp); - if (pos < 0) { - goto pm_error; - } - d->exp.pm_cap = pos; - pci_set_word(d->config + pos + PCI_PM_PMC, 0x3); + d->exp.pm_cap = pci_add_capability(d, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); + pci_set_word(d->config + d->exp.pm_cap + PCI_PM_PMC, 0x3); pcie_cap_arifwd_init(d); pcie_cap_deverr_init(d); @@ -85,7 +81,6 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) msi_error: pcie_aer_exit(d); aer_error: -pm_error: pcie_cap_exit(d); shpc_cleanup(d, &pcie_br->shpc_bar); error: