From patchwork Tue Nov 1 00:58:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13026556 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D63AFFA3740 for ; Tue, 1 Nov 2022 01:06:19 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1opfeZ-0006Dv-N9; Mon, 31 Oct 2022 21:01:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opfdn-0004qu-2s for qemu-devel@nongnu.org; Mon, 31 Oct 2022 21:00:33 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1opfdf-0006Yv-DP for qemu-devel@nongnu.org; Mon, 31 Oct 2022 21:00:28 -0400 Received: by mail-pf1-x436.google.com with SMTP id i3so12124040pfc.11 for ; Mon, 31 Oct 2022 18:00:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SnM99KyqX7P48Yqolo9mjrgei37okMKuMCflMKIVI0w=; b=iOsDSIAZ/NPorQWE2wDozuwolZFjqJJey6XQYLdigEnXldOi4qHV85REsuYL+zGrHU tt14Bv99kWsRvvVvAxx7zwgsYPmOnp6JFMnn6ajoEDy9VQ6rjW3nqvH6WlzOjrnp7w+z XnFoTXaNRtFEDe8SnmDCElCYAtvDEZRjGHSD5bdZYf8yS/NdpVxV9EmpaGcpESdwZFxn OsoygyQu9a1o6FFONLu85hsJRSBDtjbQv8/l7T9T+QroVsihmrp+C3gFPLStQKLLWkvT 6/hejZvydhYUfE+omcMb0aEe885Sbri3aaYN0x1yArnlkaZ5b7EudWUqf7B/wDU/3mLn G2og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SnM99KyqX7P48Yqolo9mjrgei37okMKuMCflMKIVI0w=; b=nx2YG8+kCX4CMSfKYamg7USFAepMCZ7glZn3o7PILZRC3ITcAk+hyIgbnVKfiTh4dI QaSK0QD7CWfGO0HoIuAx+6b1t3O1V+wgCLCGxphHTtQp2u9lbCOagOg6hZ8zSZYBx0JU S12K1ESbtoWz7p5QUZr1jLDovCQYOMotAbg6S1RRMMwknMYz00ceiNxPXSIWVwBoN+p/ x50Tsui+VMrn2w+Qx8PozTvhHapRzwsDAYtKV51SH7wshEsNx9dtjoflJGI5lUDpnMz8 8RowYK03o2EdrucvDLFucINbvLYRO+nk9doMwtp81wrLYYjYxpMQvG02N27PBF5+iz12 6R6g== X-Gm-Message-State: ACrzQf3jYD4KB7jv854B0BTg7rPawV5eUNmAvm7LCieFw8WeH+HmX5Y+ KaH3g7MULzy8UZTYOHS8Exa+jiDaFF3KudvG X-Google-Smtp-Source: AMsMyM53LuwWybo81+MiPmxQMCdQJ3gocm0Icts03QTV4DgZZmxaComYu42eIVpkyGVX2vTej4KBrA== X-Received: by 2002:a05:6a00:d72:b0:56c:3c45:6953 with SMTP id n50-20020a056a000d7200b0056c3c456953mr17214543pfv.54.1667264419788; Mon, 31 Oct 2022 18:00:19 -0700 (PDT) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id o9-20020aa79789000000b0056d98e359a5sm1875644pfp.165.2022.10.31.18.00.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Oct 2022 18:00:19 -0700 (PDT) From: Akihiko Odaki To: Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, qemu-arm@nongnu.org, "Michael S . Tsirkin" , Marcel Apfelbaum , Gerd Hoffmann , Paolo Bonzini , Richard Henderson , Eduardo Habkost , John Snow , Dmitry Fleytman , Jason Wang , Stefan Weil , Keith Busch , Klaus Jensen , Peter Maydell , Andrey Smirnov , Paul Burton , Aleksandar Rikalo , Yan Vugenfirer , Yuri Benditovich , Akihiko Odaki Subject: [PATCH v7 14/17] hw/pci-bridge/pcie_pci_bridge: Omit errp for pci_add_capability Date: Tue, 1 Nov 2022 09:58:56 +0900 Message-Id: <20221101005859.4198-15-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221101005859.4198-1-akihiko.odaki@daynix.com> References: <20221101005859.4198-1-akihiko.odaki@daynix.com> MIME-Version: 1.0 Received-SPF: none client-ip=2607:f8b0:4864:20::436; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org+qemu-devel=archiver.kernel.org@nongnu.org Omitting errp for pci_add_capability() causes it to abort if capabilities overlap. This behavior is appropriate heare because all of the capabilities set in this device are defined in the program and their overlap should not happen unless there is a programming error. Signed-off-by: Akihiko Odaki --- hw/pci-bridge/pcie_pci_bridge.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c index 99778e3e24..1b839465e7 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -35,7 +35,7 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) { PCIBridge *br = PCI_BRIDGE(d); PCIEPCIBridge *pcie_br = PCIE_PCI_BRIDGE_DEV(d); - int rc, pos; + int rc; pci_bridge_initfn(d, TYPE_PCI_BUS); @@ -49,12 +49,8 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) pcie_cap_init(d, 0, PCI_EXP_TYPE_PCI_BRIDGE, 0); - pos = pci_add_capability(d, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF, errp); - if (pos < 0) { - goto pm_error; - } - d->exp.pm_cap = pos; - pci_set_word(d->config + pos + PCI_PM_PMC, 0x3); + d->exp.pm_cap = pci_add_capability(d, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); + pci_set_word(d->config + d->exp.pm_cap + PCI_PM_PMC, 0x3); pcie_cap_arifwd_init(d); pcie_cap_deverr_init(d); @@ -85,7 +81,6 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error **errp) msi_error: pcie_aer_exit(d); aer_error: -pm_error: pcie_cap_exit(d); shpc_cleanup(d, &pcie_br->shpc_bar); error: