@@ -40,7 +40,9 @@
#include "hw/virtio/virtio-pci.h"
#include "qom/object_interfaces.h"
-GlobalProperty hw_compat_7_2[] = {};
+GlobalProperty hw_compat_7_2[] = {
+ { "arm-gicv3-its", "itt-entry-size", "12" },
+};
const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2);
GlobalProperty hw_compat_7_1[] = {
@@ -2014,8 +2014,7 @@ static void gicv3_its_post_load(GICv3ITSState *s)
static Property gicv3_its_props[] = {
DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "arm-gicv3",
GICv3State *),
- DEFINE_PROP_UINT8("itt-entry-size", GICv3ITSState, itt_entry_size,
- MIN_ITS_ITT_ENTRY_SIZE),
+ DEFINE_PROP_UINT8("itt-entry-size", GICv3ITSState, itt_entry_size, 16),
DEFINE_PROP_END_OF_LIST(),
};
Some Operating Systems (like Windows) can only deal with ITT entry sizes that are a power of 2. While the spec allows arbitrarily sized ITT entry sizes, in practice all hardware will use power of 2 because that simplifies offset calculation and ensures that a power of 2 sized region can hold a set of entries without gap at the end. So let's just bump the entry size to 16. That gives us enough space for the 12 bytes of data that we want to have in each ITT entry and makes QEMU look a bit more like real hardware. Signed-off-by: Alexander Graf <agraf@csgraf.de> --- hw/core/machine.c | 4 +++- hw/intc/arm_gicv3_its.c | 3 +-- 2 files changed, 4 insertions(+), 3 deletions(-)