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Tsirkin" , Marcel Apfelbaum , Sriram Yagnaraman Subject: [PATCH 2/9] igb: handle PF/VF reset properly Date: Sat, 28 Jan 2023 14:46:26 +0100 Message-Id: <20230128134633.22730-3-sriram.yagnaraman@est.tech> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230128134633.22730-1-sriram.yagnaraman@est.tech> References: <20230128134633.22730-1-sriram.yagnaraman@est.tech> X-ClientProxiedBy: GVYP280CA0036.SWEP280.PROD.OUTLOOK.COM (2603:10a6:150:f9::13) To DBBP189MB1433.EURP189.PROD.OUTLOOK.COM (2603:10a6:10:1e7::15) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DBBP189MB1433:EE_|AM7P189MB0661:EE_ X-MS-Office365-Filtering-Correlation-Id: 812b4edf-b327-48cf-9368-08db0171441f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: iByd2Ukmkn0UGX9rbAzCRWA++2D8XCb9EFU+3O8vaD7cOTy2gOMjQdGdKI42zZQwHuZubzhjkyj60vI4d9SqupfG4E1aM/Me6A2V9PO/b4EPYL1Rj696ZZBdLeqrUMdFyG7rVVj0mSH2KnsvJjufXPCJs45E0+2voesYAZquMMVAARhWbSkXLzmrKEjH/EKoJisjLcDFvP3bqYRrLK82VpDPjbCy7iSusTufXSWnK4FGxHBNlRbtZBWCdEmUDNzbkAv0zw5FZl3gpWwe1SSgl3E4mcwAEUKAXbN/cmM0tXd/sT1ZUeT2j2Lt22PTdL4XXL9hKpaH3qPJtPJUryL/U2ZwkC9Z5DJAtanH3uViiZ4fxDnq6s5PdN4jJTIpUvTIH0k8EUrwwinx4rXQFCACRb0OtJRNUz7NVPMt/3JCPYqEsYRhbOhOZc9Cu0ynse7QtGyBfHSlZWTw/h99cIJy6d6UxZe2AdEUeoie8ta2utNqiu4cyW73kbOip794Q3UJ7AJmhY7Ee1wCf6LDMVvM0OlzOCZNAkeUG1yGJnTneZGXzfCqWgZlQV2CHQBPGft+ILTtIcu9+khW26f3dCS3cVhW3aistcvoR2TbR3GKqefDRtVEz4T3HFeycaV2OryunUbWMWgDfvaz9Gv8B/63LCk2BAIMZxhyo6xTszkA+B7u/odyTx7kK4g6io6OzXQ/tGzEMxyYEZabYBEY3D3jiu+MZ3SKqmNhn3GwaltLGkE= X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=sriram.yagnaraman@est.tech; helo=EUR05-DB8-obe.outbound.protection.outlook.com X-Spam_score_int: -3 X-Spam_score: -0.4 X-Spam_bar: / X-Spam_report: (-0.4 / 5.0 requ) BAYES_00=-1.9, DATE_IN_PAST_06_12=1.543, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use PFRSTD to reset RSTI bit for VFs, and raise VFLRE interrupt when VF is reset. Signed-off-by: Sriram Yagnaraman Reviewed-by: Akihiko Odaki --- hw/net/e1000x_regs.h | 1 + hw/net/igb_core.c | 33 +++++++++++++++++++++------------ hw/net/trace-events | 2 ++ 3 files changed, 24 insertions(+), 12 deletions(-) diff --git a/hw/net/e1000x_regs.h b/hw/net/e1000x_regs.h index fb5b861135..bb3fb36b8d 100644 --- a/hw/net/e1000x_regs.h +++ b/hw/net/e1000x_regs.h @@ -548,6 +548,7 @@ #define E1000_CTRL_EXT_ASDCHK 0x00001000 /* auto speed detection check */ #define E1000_CTRL_EXT_EE_RST 0x00002000 /* EEPROM reset */ +#define E1000_CTRL_EXT_PFRSTD 0x00004000 /* PF reset done indication */ #define E1000_CTRL_EXT_LINK_EN 0x00010000 /* enable link status from external LINK_0 and LINK_1 pins */ #define E1000_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ #define E1000_CTRL_EXT_EIAME 0x01000000 diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index abeb9c7889..9bd53cc25f 100644 --- a/hw/net/igb_core.c +++ b/hw/net/igb_core.c @@ -1902,14 +1902,6 @@ static void igb_set_eims(IGBCore *core, int index, uint32_t val) igb_update_interrupt_state(core); } -static void igb_vf_reset(IGBCore *core, uint16_t vfn) -{ - /* TODO: Reset of the queue enable and the interrupt registers of the VF. */ - - core->mac[V2PMAILBOX0 + vfn] &= ~E1000_V2PMAILBOX_RSTI; - core->mac[V2PMAILBOX0 + vfn] = E1000_V2PMAILBOX_RSTD; -} - static void mailbox_interrupt_to_vf(IGBCore *core, uint16_t vfn) { uint32_t ent = core->mac[VTIVAR_MISC + vfn]; @@ -1987,6 +1979,17 @@ static void igb_set_vfmailbox(IGBCore *core, int index, uint32_t val) } } +static void igb_vf_reset(IGBCore *core, uint16_t vfn) +{ + /* disable Rx and Tx for the VF*/ + core->mac[VFTE] &= ~BIT(vfn); + core->mac[VFRE] &= ~BIT(vfn); + /* indicate VF reset to PF */ + core->mac[VFLRE] |= BIT(vfn); + /* VFLRE and mailbox use the same interrupt cause */ + mailbox_interrupt_to_pf(core); +} + static void igb_w1c(IGBCore *core, int index, uint32_t val) { core->mac[index] &= ~val; @@ -2241,14 +2244,20 @@ igb_set_status(IGBCore *core, int index, uint32_t val) static void igb_set_ctrlext(IGBCore *core, int index, uint32_t val) { - trace_e1000e_link_set_ext_params(!!(val & E1000_CTRL_EXT_ASDCHK), - !!(val & E1000_CTRL_EXT_SPD_BYPS)); - - /* TODO: PFRSTD */ + trace_igb_link_set_ext_params(!!(val & E1000_CTRL_EXT_ASDCHK), + !!(val & E1000_CTRL_EXT_SPD_BYPS), + !!(val & E1000_CTRL_EXT_PFRSTD)); /* Zero self-clearing bits */ val &= ~(E1000_CTRL_EXT_ASDCHK | E1000_CTRL_EXT_EE_RST); core->mac[CTRL_EXT] = val; + + if (core->mac[CTRL_EXT] & E1000_CTRL_EXT_PFRSTD) { + for (int vfn = 0; vfn < IGB_MAX_VF_FUNCTIONS; vfn++) { + core->mac[V2PMAILBOX0 + vfn] &= ~E1000_V2PMAILBOX_RSTI; + core->mac[V2PMAILBOX0 + vfn] |= E1000_V2PMAILBOX_RSTD; + } + } } static void diff --git a/hw/net/trace-events b/hw/net/trace-events index 2f791b9b57..e94172e748 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -281,6 +281,8 @@ igb_core_mdic_read_unhandled(uint32_t addr) "MDIC READ: PHY[%u] UNHANDLED" igb_core_mdic_write(uint32_t addr, uint32_t data) "MDIC WRITE: PHY[%u] = 0x%x" igb_core_mdic_write_unhandled(uint32_t addr) "MDIC WRITE: PHY[%u] UNHANDLED" +igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) "Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done: %d" + igb_rx_desc_buff_size(uint32_t b) "buffer size: %u" igb_rx_desc_buff_write(uint64_t addr, uint16_t offset, const void* source, uint32_t len) "addr: 0x%"PRIx64", offset: %u, from: %p, length: %u"