| Message ID | 20230210163731.970130-2-jean-philippe@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] hw/arm/smmu-common: Support 64-bit addresses | expand |
On 2/10/23 06:37, Jean-Philippe Brucker wrote: > Addresses targeting the second translation table (TTB1) in the SMMU have > all upper bits set. Ensure the IOMMU region covers all 64 bits. > > Signed-off-by: Jean-Philippe Brucker<jean-philippe@linaro.org> > --- > hw/arm/smmu-common.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
Hi Jean, On 2/10/23 17:37, Jean-Philippe Brucker wrote: > Addresses targeting the second translation table (TTB1) in the SMMU have > all upper bits set. Ensure the IOMMU region covers all 64 bits. > > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> > --- > hw/arm/smmu-common.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c > index 733c964778..2b8c67b9a1 100644 > --- a/hw/arm/smmu-common.c > +++ b/hw/arm/smmu-common.c > @@ -439,7 +439,7 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn) > > memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu), > s->mrtypename, > - OBJECT(s), name, 1ULL << SMMU_MAX_VA_BITS); > + OBJECT(s), name, UINT64_MAX); as SMMU_MAX_VA_BITS is not used anymore, please remove it. > address_space_init(&sdev->as, > MEMORY_REGION(&sdev->iommu), name); > trace_smmu_add_mr(name); Thanks Eric
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 733c964778..2b8c67b9a1 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -439,7 +439,7 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn) memory_region_init_iommu(&sdev->iommu, sizeof(sdev->iommu), s->mrtypename, - OBJECT(s), name, 1ULL << SMMU_MAX_VA_BITS); + OBJECT(s), name, UINT64_MAX); address_space_init(&sdev->as, MEMORY_REGION(&sdev->iommu), name); trace_smmu_add_mr(name);
Addresses targeting the second translation table (TTB1) in the SMMU have all upper bits set. Ensure the IOMMU region covers all 64 bits. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> --- hw/arm/smmu-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)