From patchwork Fri Feb 17 17:51:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Palmer Dabbelt X-Patchwork-Id: 13145106 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92309C636D6 for ; Fri, 17 Feb 2023 17:57:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pT4vT-00059k-O4; Fri, 17 Feb 2023 12:53:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pT4vR-000583-Rx for qemu-devel@nongnu.org; Fri, 17 Feb 2023 12:53:37 -0500 Received: from mail-pj1-x1035.google.com ([2607:f8b0:4864:20::1035]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pT4vP-0000sp-MD for qemu-devel@nongnu.org; Fri, 17 Feb 2023 12:53:37 -0500 Received: by mail-pj1-x1035.google.com with SMTP id d2-20020a17090a498200b00236679bc70cso2951869pjh.4 for ; Fri, 17 Feb 2023 09:53:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=to:from:cc:content-transfer-encoding:mime-version:references :in-reply-to:message-id:date:subject:from:to:cc:subject:date :message-id:reply-to; bh=qM65WvJmtqBdo7YXUq2tCaQm5DhPxT8kHRMe5UdjLts=; b=AmZRywyvZwm92t7Tr97heVhWXNZJbSeE7fNiofc5UeZY9BqubaIccHMmqg1kfNgA2L cVqKkmAUtNOLIRQPeYy9KnGQDhN/BGPPjGtkvnzPPQkOx+4AmOBEWQU9gPwryOvEgFmH 76022UU9s4HGlgbHz3hJsAc94p1d8gfX11YXtpJetfm+H+yL90QfUTWxIej9nKQmRkU3 o/uB6RwOBn+1WwprOuaz8yAVuRL6AGo22Rt6Ma9Rs8u84CdemRG0VFUL5m4GsEWefyRu 6Goc3kV/bD6jEfW6iWn6XahkXqVZAMD5ILEgEwAOHlpBWx6z28C0xKrhwpGEIcUePYZn +QNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:from:cc:content-transfer-encoding:mime-version:references :in-reply-to:message-id:date:subject:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qM65WvJmtqBdo7YXUq2tCaQm5DhPxT8kHRMe5UdjLts=; b=Wx9I7+LvejgaGre+ZVNnDPfXvv7a8gC5lVa6Msv7Ayy1AHeXCX7KRcyw9Pvos9OZ8H KrLu2hv+8Q36mGO5gNfRHUxVVksv+tbzY0FHzC22Wy5M4+jC+HV5FChw8c9ABQj/J8OP p4aSv4ntssVL8jaVtjPijUb4A9WWksO2OZI7SpchvqOLwCIM+o5+7/o1FsobxICWFqL5 KT4Iwm1yv2UVli3Rc/pyo06X0SNOBYOnHhZiQqlcJFDU/vX9ZyWc0uo+huah3KbV6JdS JFOlJS+NQjMvpm3pul0p3fpT1A/l/XSdC+FJTj2KXDiNSzHdg256b7Doi4hsgtFsZHZu +SqA== X-Gm-Message-State: AO0yUKW6oQ5B58RkMgTKVPMstQ265/WvSwPFn5RySv92qScODrJobB+v vz7CJr4g+TYP4+jn2/u4yz9Wlw== X-Google-Smtp-Source: AK7set/Nxbx5dbFqe+Z8dCiOfvbhANtjLgTLu4SlYo/VRxTClpx8+/Hngxz8n0KjRbkknd11pD8IeQ== X-Received: by 2002:a17:90b:b01:b0:236:75d3:fedc with SMTP id bf1-20020a17090b0b0100b0023675d3fedcmr2635626pjb.8.1676656413791; Fri, 17 Feb 2023 09:53:33 -0800 (PST) Received: from localhost ([135.180.226.51]) by smtp.gmail.com with ESMTPSA id q6-20020a17090a304600b002341c0ff245sm1040707pjl.19.2023.02.17.09.53.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 09:53:33 -0800 (PST) Subject: [PULL 2/9] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel() Date: Fri, 17 Feb 2023 09:51:56 -0800 Message-Id: <20230217175203.19510-3-palmer@rivosinc.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230217175203.19510-1-palmer@rivosinc.com> References: <20230217175203.19510-1-palmer@rivosinc.com> MIME-Version: 1.0 Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Daniel Henrique Barboza , Palmer Dabbelt , Bin Meng , Alistair Francis , ilippe=20Mathieu-Daud=C3=A9?= , Palmer Dabbelt From: Palmer Dabbelt To: Peter Maydell Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=palmer@rivosinc.com; helo=mail-pj1-x1035.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Daniel Henrique Barboza The microchip_icicle_kit, sifive_u, spike and virt boards are now doing the same steps when '-kernel' is used: - execute load_kernel() - load init_rd() - write kernel_cmdline Let's fold everything inside riscv_load_kernel() to avoid code repetition. To not change the behavior of boards that aren't calling riscv_load_init(), add an 'load_initrd' flag to riscv_load_kernel() and allow these boards to opt out from initrd loading. Cc: Palmer Dabbelt Reviewed-by: Bin Meng Reviewed-by: Alistair Francis Signed-off-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20230206140022.2748401-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- hw/riscv/boot.c | 11 +++++++++++ hw/riscv/microchip_pfsoc.c | 11 +---------- hw/riscv/opentitan.c | 3 ++- hw/riscv/sifive_e.c | 3 ++- hw/riscv/sifive_u.c | 11 +---------- hw/riscv/spike.c | 11 +---------- hw/riscv/virt.c | 11 +---------- include/hw/riscv/boot.h | 1 + 8 files changed, 20 insertions(+), 42 deletions(-) diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c index df6b4a1fba..4954bb9d4b 100644 --- a/hw/riscv/boot.c +++ b/hw/riscv/boot.c @@ -176,10 +176,12 @@ target_ulong riscv_load_firmware(const char *firmware_filename, target_ulong riscv_load_kernel(MachineState *machine, RISCVHartArrayState *harts, target_ulong kernel_start_addr, + bool load_initrd, symbol_fn_t sym_cb) { const char *kernel_filename = machine->kernel_filename; uint64_t kernel_load_base, kernel_entry; + void *fdt = machine->fdt; g_assert(kernel_filename != NULL); @@ -220,6 +222,15 @@ out: kernel_entry = extract64(kernel_entry, 0, 32); } + if (load_initrd && machine->initrd_filename) { + riscv_load_initrd(machine, kernel_entry); + } + + if (fdt && machine->kernel_cmdline && *machine->kernel_cmdline) { + qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", + machine->kernel_cmdline); + } + return kernel_entry; } diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c index 712625d2a4..e81bbd12df 100644 --- a/hw/riscv/microchip_pfsoc.c +++ b/hw/riscv/microchip_pfsoc.c @@ -630,16 +630,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine) firmware_end_addr); kernel_entry = riscv_load_kernel(machine, &s->soc.u_cpus, - kernel_start_addr, NULL); - - if (machine->initrd_filename) { - riscv_load_initrd(machine, kernel_entry); - } - - if (machine->kernel_cmdline && *machine->kernel_cmdline) { - qemu_fdt_setprop_string(machine->fdt, "/chosen", - "bootargs", machine->kernel_cmdline); - } + kernel_start_addr, true, NULL); /* Compute the fdt load address in dram */ fdt_load_addr = riscv_compute_fdt_addr(memmap[MICROCHIP_PFSOC_DRAM_LO].base, diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c index 7fe4fb5628..b06944d382 100644 --- a/hw/riscv/opentitan.c +++ b/hw/riscv/opentitan.c @@ -102,7 +102,8 @@ static void opentitan_board_init(MachineState *machine) if (machine->kernel_filename) { riscv_load_kernel(machine, &s->soc.cpus, - memmap[IBEX_DEV_RAM].base, NULL); + memmap[IBEX_DEV_RAM].base, + false, NULL); } } diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 1a7d381514..04939b60c3 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -115,7 +115,8 @@ static void sifive_e_machine_init(MachineState *machine) if (machine->kernel_filename) { riscv_load_kernel(machine, &s->soc.cpus, - memmap[SIFIVE_E_DEV_DTIM].base, NULL); + memmap[SIFIVE_E_DEV_DTIM].base, + false, NULL); } } diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 71be442a50..ad3bb35b34 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -599,16 +599,7 @@ static void sifive_u_machine_init(MachineState *machine) firmware_end_addr); kernel_entry = riscv_load_kernel(machine, &s->soc.u_cpus, - kernel_start_addr, NULL); - - if (machine->initrd_filename) { - riscv_load_initrd(machine, kernel_entry); - } - - if (machine->kernel_cmdline && *machine->kernel_cmdline) { - qemu_fdt_setprop_string(machine->fdt, "/chosen", "bootargs", - machine->kernel_cmdline); - } + kernel_start_addr, true, NULL); } else { /* * If dynamic firmware is used, it doesn't know where is the next mode diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 1fa91167ab..a584d5b3a2 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -307,16 +307,7 @@ static void spike_board_init(MachineState *machine) kernel_entry = riscv_load_kernel(machine, &s->soc[0], kernel_start_addr, - htif_symbol_callback); - - if (machine->initrd_filename) { - riscv_load_initrd(machine, kernel_entry); - } - - if (machine->kernel_cmdline && *machine->kernel_cmdline) { - qemu_fdt_setprop_string(machine->fdt, "/chosen", "bootargs", - machine->kernel_cmdline); - } + true, htif_symbol_callback); } else { /* * If dynamic firmware is used, it doesn't know where is the next mode diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 797c6084b6..86c4adc0c9 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1278,16 +1278,7 @@ static void virt_machine_done(Notifier *notifier, void *data) firmware_end_addr); kernel_entry = riscv_load_kernel(machine, &s->soc[0], - kernel_start_addr, NULL); - - if (machine->initrd_filename) { - riscv_load_initrd(machine, kernel_entry); - } - - if (machine->kernel_cmdline && *machine->kernel_cmdline) { - qemu_fdt_setprop_string(machine->fdt, "/chosen", "bootargs", - machine->kernel_cmdline); - } + kernel_start_addr, true, NULL); } else { /* * If dynamic firmware is used, it doesn't know where is the next mode diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 6295316afb..ea1de8b020 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -46,6 +46,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename, target_ulong riscv_load_kernel(MachineState *machine, RISCVHartArrayState *harts, target_ulong firmware_end_addr, + bool load_initrd, symbol_fn_t sym_cb); void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry); uint64_t riscv_compute_fdt_addr(hwaddr dram_start, uint64_t dram_size,