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Wed, 22 Mar 2023 20:26:11 +0000 From: Aaron Lindsay To: qemu-devel@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Vincent Dehors , =?utf-8?q?Alex_Benn=C3=A9e?= , Peter Maydell Cc: Aaron Lindsay Subject: [PATCH v3 1/8] target/arm: Add ID_AA64ISAR2_EL1 Date: Wed, 22 Mar 2023 16:25:34 -0400 Message-Id: <20230322202541.1404058-2-aaron@os.amperecomputing.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230322202541.1404058-1-aaron@os.amperecomputing.com> References: <20230322202541.1404058-1-aaron@os.amperecomputing.com> X-ClientProxiedBy: CH2PR03CA0008.namprd03.prod.outlook.com (2603:10b6:610:59::18) To CH0PR01MB7124.prod.exchangelabs.com (2603:10b6:610:f3::20) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH0PR01MB7124:EE_|SN6PR0102MB3406:EE_ X-MS-Office365-Filtering-Correlation-Id: aac51025-5554-4202-5035-08db2b13ad4e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5v9nlYvbg7qFXKAIb96U4ibMk/zRTerxf3DyxljpXrtZgsvzrvB8wVCNqXt82a81lMGwcFFugDunbLTlANY4VUNGko798nwBp/Cyo0LSJPAziPUC81wVbDi9zwP63nh3P/5IrlYopWYKxwcqwaSgRDtPwOFiElygszdJf5FlNQxav3JHplHXDqL8Hv4N3d8GNB0p1Gd91A+oY/eFjSp/70Yz2QrjJtTSBdG4e/qUd0im82EQsXC4jnVEtyr03PXYhNVmf0xI0UxtqzrNZielYhoM4ozu3geup60HJBzhmpC+IYd7sU4FrtzQvtpwtgloAZFxWqi3u2Ct1t3BUBlFEDWWNxPwIoLyNohf03ZQiI9GRgG1DyxGt0qmjCDNx9eo/6Rvw8UY4DLlcUsETXZj+Q01ipiG54O1G9tvy8NomE4QSlmuYU0Nm/kuCWhbpQh5qYwApnk5ylBG0J2nzsUVFoGZ8USu6IzOAWuOKNTLLjZhhijzCggAB2hOxn7Ers7AZgsIKMKIU/OMxvU5S9jxI3wTVtSPptWK2n0ynLpqHk20C9buHm2qzSPY0aaI4sUrhzXPFRPI0ZqUhp/ZoD+5k91MkJMA4oUSCLoOfsEeqDlWwQzCqAiEFVX5hwYN4o+moivRBHkdqgBSjnMjSqeKA1ds/D3hgkPNCW8K0L6XW1fT4MAu+o736vMD/REO3I93C70WtScUP0C1ChJRcjkeUA== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=aaron@os.amperecomputing.com; helo=NAM10-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Aaron Lindsay Reviewed-by: Richard Henderson --- target/arm/cpu.h | 1 + target/arm/helper.c | 4 ++-- target/arm/hvf/hvf.c | 1 + target/arm/kvm64.c | 2 ++ 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c097cae988..f0f27f259d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1015,6 +1015,7 @@ struct ArchCPU { uint32_t dbgdevid1; uint64_t id_aa64isar0; uint64_t id_aa64isar1; + uint64_t id_aa64isar2; uint64_t id_aa64pfr0; uint64_t id_aa64pfr1; uint64_t id_aa64mmfr0; diff --git a/target/arm/helper.c b/target/arm/helper.c index 2297626bfb..32426495c0 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8204,11 +8204,11 @@ void register_cp_regs_for_features(ARMCPU *cpu) .access = PL1_R, .type = ARM_CP_CONST, .accessfn = access_aa64_tid3, .resetvalue = cpu->isar.id_aa64isar1 }, - { .name = "ID_AA64ISAR2_EL1_RESERVED", .state = ARM_CP_STATE_AA64, + { .name = "ID_AA64ISAR2_EL1", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 6, .opc2 = 2, .access = PL1_R, .type = ARM_CP_CONST, .accessfn = access_aa64_tid3, - .resetvalue = 0 }, + .resetvalue = cpu->isar.id_aa64isar2 }, { .name = "ID_AA64ISAR3_EL1_RESERVED", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 6, .opc2 = 3, .access = PL1_R, .type = ARM_CP_CONST, diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index ad65603445..4d7366b761 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -507,6 +507,7 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) { HV_SYS_REG_ID_AA64DFR1_EL1, &host_isar.id_aa64dfr1 }, { HV_SYS_REG_ID_AA64ISAR0_EL1, &host_isar.id_aa64isar0 }, { HV_SYS_REG_ID_AA64ISAR1_EL1, &host_isar.id_aa64isar1 }, + { HV_SYS_REG_ID_AA64ISAR2_EL1, &host_isar.id_aa64isar2 }, { HV_SYS_REG_ID_AA64MMFR0_EL1, &host_isar.id_aa64mmfr0 }, { HV_SYS_REG_ID_AA64MMFR1_EL1, &host_isar.id_aa64mmfr1 }, { HV_SYS_REG_ID_AA64MMFR2_EL1, &host_isar.id_aa64mmfr2 }, diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 1197253d12..4b71306f92 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -590,6 +590,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) ARM64_SYS_REG(3, 0, 0, 6, 0)); err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar1, ARM64_SYS_REG(3, 0, 0, 6, 1)); + err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar2, + ARM64_SYS_REG(3, 0, 0, 6, 2)); err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr0, ARM64_SYS_REG(3, 0, 0, 7, 0)); err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr1,