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Wed, 22 Mar 2023 20:26:21 +0000 From: Aaron Lindsay To: qemu-devel@nongnu.org, qemu-arm@nongnu.org, Richard Henderson , Vincent Dehors , =?utf-8?q?Alex_Benn=C3=A9e?= , Peter Maydell Cc: Aaron Lindsay Subject: [PATCH v3 8/8] target/arm: Add CPU property for QARMA3, enable FPACCombined by default Date: Wed, 22 Mar 2023 16:25:41 -0400 Message-Id: <20230322202541.1404058-9-aaron@os.amperecomputing.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230322202541.1404058-1-aaron@os.amperecomputing.com> References: <20230322202541.1404058-1-aaron@os.amperecomputing.com> X-ClientProxiedBy: CH2PR03CA0008.namprd03.prod.outlook.com (2603:10b6:610:59::18) To CH0PR01MB7124.prod.exchangelabs.com (2603:10b6:610:f3::20) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH0PR01MB7124:EE_|SA1PR01MB7342:EE_ X-MS-Office365-Filtering-Correlation-Id: c6abfe1c-4d02-45b5-f5b7-08db2b13b35e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: IjIo1nsitJUNUim3lWmf1sys44kqYh+A1V6V776xbuyqzJ8R7Zug0dNmuYj/DDrDxMyIpjbghVlclBn9I0roEp3EDiHbZ6gHRFg1WXB2UEyH/BZ7pblyhjc/+47oBd1aDK1IWRFRbXrEXhYvqJ4EkOnkM9VN7cMoT7GbCF2wfY13zq/Av4vkvS3KXHWPkMn1pGxpgXDnSHUuj3WTUvrF2h3YtVuAx0oNCPyhrpldqSJterLidkJhys/a3Rk+F72do2VqD0X67vXyi3K5zaAiAG3r4ZSNvzJ/6BZIxag7d02Af5TENEc9tU4jxJC6tpwBUhcb2qVqqmsgUYeKyRkQCJGK2c6M4QB2jp1AFlUzLFDNHPyNY0K/ReQUh0OHyRWb8VWBPgKev3TgcjgwdyWUBHMR7x0KjR54lgXtc1lOf3qHLe6HbNhAXP+NDwde1eq3gruPSoL5/GeS25i47CI4w33jjyk8PezB0lZwwzZtRUe/sHu1if4nOe9kHUoeHF9OZCNzTMpa7GrHCUtzMAEB9vefX0a/9zJtKweK0k/tUTVcbhTFKmMh07fGTGGTKMFOfkV3ITuTAvsGFtpZCLkm58isTBOwJSZJYQ1L19/EdVGjAKktk2RQo0VtIb+LDVEiktM97c8VGJs7oG6XI7j8i2N78IxLo/HRyA9FwZI9UjcpniTxe+1wyPV2+QJ69RKHIkrDnZKNTGwummR7U1SyeA== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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envelope-from=aaron@os.amperecomputing.com; helo=NAM10-BN7-obe.outbound.protection.outlook.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Aaron Lindsay Reviewed-by: Richard Henderson --- target/arm/cpu.h | 1 + target/arm/cpu64.c | 48 +++++++++++++++++++++++++++++++--------------- 2 files changed, 34 insertions(+), 15 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 868d844d5a..80683c428f 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1053,6 +1053,7 @@ struct ArchCPU { */ bool prop_pauth; bool prop_pauth_impdef; + bool prop_pauth_qarma3; bool prop_lpa2; /* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */ diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 0fb07cc7b6..a5f4540c73 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -591,9 +591,6 @@ static void aarch64_add_sme_properties(Object *obj) void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) { - int arch_val = 0, impdef_val = 0; - uint64_t t; - /* Exit early if PAuth is enabled, and fall through to disable it */ if ((kvm_enabled() || hvf_enabled()) && cpu->prop_pauth) { if (!cpu_isar_feature(aa64_pauth, cpu)) { @@ -604,30 +601,50 @@ void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) return; } - /* TODO: Handle HaveEnhancedPAC, HaveEnhancedPAC2, HaveFPAC. */ + /* Write the features into the correct field for the algorithm in use */ if (cpu->prop_pauth) { + uint64_t t; + + if (cpu->prop_pauth_impdef && cpu->prop_pauth_qarma3) { + error_setg(errp, "Cannot set both qarma3 ('pauth-qarma3') and " + "impdef ('pauth-impdef') pointer authentication ciphers"); + return; + } + + /* Implement FEAT_FPACCOMBINE for address authentication and enable + * generic authentication for the chosen cipher. + */ + int address_auth = 0b0101; + int generic_auth = 0b0001; + if (cpu->prop_pauth_impdef) { - impdef_val = 1; + t = cpu->isar.id_aa64isar1; + t = FIELD_DP64(t, ID_AA64ISAR1, API, address_auth); + t = FIELD_DP64(t, ID_AA64ISAR1, GPI, generic_auth); + cpu->isar.id_aa64isar1 = t; + } else if (cpu->prop_pauth_qarma3) { + t = cpu->isar.id_aa64isar2; + t = FIELD_DP64(t, ID_AA64ISAR2, APA3, address_auth); + t = FIELD_DP64(t, ID_AA64ISAR2, GPA3, generic_auth); + cpu->isar.id_aa64isar2 = t; } else { - arch_val = 1; + t = cpu->isar.id_aa64isar1; + t = FIELD_DP64(t, ID_AA64ISAR1, APA, address_auth); + t = FIELD_DP64(t, ID_AA64ISAR1, GPA, generic_auth); + cpu->isar.id_aa64isar1 = t; } - } else if (cpu->prop_pauth_impdef) { - error_setg(errp, "cannot enable pauth-impdef without pauth"); + } else if (cpu->prop_pauth_impdef || cpu->prop_pauth_qarma3) { + error_setg(errp, "cannot enable pauth-impdef or pauth-qarma3 without pauth"); error_append_hint(errp, "Add pauth=on to the CPU property list.\n"); } - - t = cpu->isar.id_aa64isar1; - t = FIELD_DP64(t, ID_AA64ISAR1, APA, arch_val); - t = FIELD_DP64(t, ID_AA64ISAR1, GPA, arch_val); - t = FIELD_DP64(t, ID_AA64ISAR1, API, impdef_val); - t = FIELD_DP64(t, ID_AA64ISAR1, GPI, impdef_val); - cpu->isar.id_aa64isar1 = t; } static Property arm_cpu_pauth_property = DEFINE_PROP_BOOL("pauth", ARMCPU, prop_pauth, true); static Property arm_cpu_pauth_impdef_property = DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false); +static Property arm_cpu_pauth_qarma3_property = + DEFINE_PROP_BOOL("pauth-qarma3", ARMCPU, prop_pauth_qarma3, false); static void aarch64_add_pauth_properties(Object *obj) { @@ -647,6 +664,7 @@ static void aarch64_add_pauth_properties(Object *obj) cpu->prop_pauth = cpu_isar_feature(aa64_pauth, cpu); } else { qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property); + qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_qarma3_property); } }