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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id jf2-20020a170903268200b001a207906418sm6234820plb.23.2023.04.24.02.07.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Apr 2023 02:07:53 -0700 (PDT) From: Yong-Xuan Wang To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: rkanwal@rivosinc.com, anup@brainfault.org, dbarboza@ventanamicro.com, atishp@atishpatra.org, vincent.chen@sifive.com, greentime.hu@sifive.com, frank.chang@sifive.com, Yong-Xuan Wang , Palmer Dabbelt , Alistair Francis , Bin Meng Subject: [PATCH 6/6] target/riscv: select KVM AIA in riscv virt machine Date: Mon, 24 Apr 2023 09:07:08 +0000 Message-Id: <20230424090716.15674-7-yongxuan.wang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230424090716.15674-1-yongxuan.wang@sifive.com> References: <20230424090716.15674-1-yongxuan.wang@sifive.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=yongxuan.wang@sifive.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Select KVM AIA when the host kernel has in-kernel AIA chip support. Signed-off-by: Yong-Xuan Wang Reviewed-by: Jim Shu --- hw/riscv/virt.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 18aede7b23..908b304991 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -35,6 +35,7 @@ #include "hw/riscv/virt.h" #include "hw/riscv/boot.h" #include "hw/riscv/numa.h" +#include "kvm_riscv.h" #include "hw/intc/riscv_aclint.h" #include "hw/intc/riscv_aplic.h" #include "hw/intc/riscv_imsic.h" @@ -1215,6 +1216,15 @@ static DeviceState *virt_create_aia(RISCVVirtAIAType aia_type, int aia_guests, msimode, false, aplic_m); } + if (kvm_irqchip_in_kernel()) { + kvm_riscv_aia_create( + aplic_s, msimode, socket, + VIRT_IRQCHIP_NUM_SOURCES, + hart_count, + memmap[VIRT_APLIC_S].base + socket * memmap[VIRT_APLIC_S].size, + memmap[VIRT_IMSIC_S].base + socket * VIRT_IMSIC_GROUP_MAX_SIZE); + } + return kvm_enabled() ? aplic_s : aplic_m; }