| Message ID | 20230519085802.2106900-1-lizhijian@cn.fujitsu.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] docs/cxl: Correct CFMW number | expand |
On Fri, 19 May 2023 16:58:01 +0800 Li Zhijian <lizhijian@cn.fujitsu.com> wrote: > The 'Notes:' in this document mentioned CFMW{0-2}, but the figure missed > CFMW2. > > Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com> > --- > I'm totally new to CXL, so i have little confidence to this change :) I believe this one is already fixed upstream by Brice Goglin https://gitlab.com/qemu-project/qemu/-/commit/ca4750583a597e97cbf8cec008d228f95d22c4 Otherwise was good! Thanks, Jonathan > --- > docs/system/devices/cxl.rst | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst > index dce43476129..d3577a4d6da 100644 > --- a/docs/system/devices/cxl.rst > +++ b/docs/system/devices/cxl.rst > @@ -162,7 +162,7 @@ Example system Topology. x marks the match in each decoder level:: > |<------------------SYSTEM PHYSICAL ADDRESS MAP (1)----------------->| > | __________ __________________________________ __________ | > | | | | | | | | > - | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 1 | | > + | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 2 | | > | | HB0 only | | Configured to interleave memory | | HB1 only | | > | | | | memory accesses across HB0/HB1 | | | | > | |__________| |_____x____________________________| |__________| | > @@ -247,7 +247,7 @@ Example topology involving a switch:: > |<------------------SYSTEM PHYSICAL ADDRESS MAP (1)----------------->| > | __________ __________________________________ __________ | > | | | | | | | | > - | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 1 | | > + | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 2 | | > | | HB0 only | | Configured to interleave memory | | HB1 only | | > | | | | memory accesses across HB0/HB1 | | | | > | |____x_____| |__________________________________| |__________| |
diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst index dce43476129..d3577a4d6da 100644 --- a/docs/system/devices/cxl.rst +++ b/docs/system/devices/cxl.rst @@ -162,7 +162,7 @@ Example system Topology. x marks the match in each decoder level:: |<------------------SYSTEM PHYSICAL ADDRESS MAP (1)----------------->| | __________ __________________________________ __________ | | | | | | | | | - | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 1 | | + | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 2 | | | | HB0 only | | Configured to interleave memory | | HB1 only | | | | | | memory accesses across HB0/HB1 | | | | | |__________| |_____x____________________________| |__________| | @@ -247,7 +247,7 @@ Example topology involving a switch:: |<------------------SYSTEM PHYSICAL ADDRESS MAP (1)----------------->| | __________ __________________________________ __________ | | | | | | | | | - | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 1 | | + | | CFMW 0 | | CXL Fixed Memory Window 1 | | CFMW 2 | | | | HB0 only | | Configured to interleave memory | | HB1 only | | | | | | memory accesses across HB0/HB1 | | | | | |____x_____| |__________________________________| |__________| |
The 'Notes:' in this document mentioned CFMW{0-2}, but the figure missed CFMW2. Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com> --- I'm totally new to CXL, so i have little confidence to this change :) --- docs/system/devices/cxl.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)