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Tsirkin" , Igor Mammedov , Ani Sinha , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum , Stefan Berger Subject: [PATCH v2 06/11] tpm_crb: move ACPI table building to device interface Date: Fri, 14 Jul 2023 00:09:22 -0700 Message-ID: <20230714070931.23476-7-j@getutm.app> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230714070931.23476-1-j@getutm.app> References: <20230714070931.23476-1-j@getutm.app> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.215.182; envelope-from=osy86dev@gmail.com; helo=mail-pg1-f182.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This logic is similar to TPM TIS ISA device. Since TPM CRB can only support TPM 2.0 backends, we check for this in realize. Signed-off-by: Joelle van Dyne Reviewed-by: Stefan Berger --- hw/i386/acpi-build.c | 23 ----------------------- hw/tpm/tpm_crb.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 23 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 9c74fa17ad..b767df39df 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1441,9 +1441,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, uint32_t nr_mem = machine->ram_slots; int root_bus_limit = 0xFF; PCIBus *bus = NULL; -#ifdef CONFIG_TPM - TPMIf *tpm = tpm_find(); -#endif bool cxl_present = false; int i; VMBusBridge *vmbus_bridge = vmbus_bridge_find(); @@ -1793,26 +1790,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, } } -#ifdef CONFIG_TPM - if (TPM_IS_CRB(tpm)) { - dev = aml_device("TPM"); - aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); - aml_append(dev, aml_name_decl("_STR", - aml_string("TPM 2.0 Device"))); - crs = aml_resource_template(); - aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE, - TPM_CRB_ADDR_SIZE, AML_READ_WRITE)); - aml_append(dev, aml_name_decl("_CRS", crs)); - - aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); - aml_append(dev, aml_name_decl("_UID", aml_int(1))); - - tpm_build_ppi_acpi(tpm, dev); - - aml_append(sb_scope, dev); - } -#endif - if (pcms->sgx_epc.size != 0) { uint64_t epc_base = pcms->sgx_epc.base; uint64_t epc_size = pcms->sgx_epc.size; diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index 6144081d30..594696ffb8 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -19,6 +19,8 @@ #include "qemu/module.h" #include "qapi/error.h" #include "exec/address-spaces.h" +#include "hw/acpi/acpi_aml_interface.h" +#include "hw/acpi/tpm.h" #include "hw/qdev-properties.h" #include "hw/pci/pci_ids.h" #include "hw/acpi/tpm.h" @@ -99,6 +101,11 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp) return; } + if (tpm_crb_isa_get_version(TPM_IF(s)) != TPM_VERSION_2_0) { + error_setg(errp, "TPM CRB only supports TPM 2.0 backends"); + return; + } + tpm_crb_init_memory(OBJECT(s), &s->state, errp); memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev)), @@ -116,10 +123,30 @@ static void tpm_crb_isa_realize(DeviceState *dev, Error **errp) } } +static void build_tpm_crb_isa_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + Aml *dev, *crs; + CRBState *s = CRB(adev); + TPMIf *ti = TPM_IF(s); + + dev = aml_device("TPM"); + aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); + aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device"))); + aml_append(dev, aml_name_decl("_UID", aml_int(1))); + aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); + crs = aml_resource_template(); + aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE, TPM_CRB_ADDR_SIZE, + AML_READ_WRITE)); + aml_append(dev, aml_name_decl("_CRS", crs)); + tpm_build_ppi_acpi(ti, dev); + aml_append(scope, dev); +} + static void tpm_crb_isa_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); TPMIfClass *tc = TPM_IF_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); dc->realize = tpm_crb_isa_realize; device_class_set_props(dc, tpm_crb_isa_properties); @@ -128,6 +155,7 @@ static void tpm_crb_isa_class_init(ObjectClass *klass, void *data) tc->model = TPM_MODEL_TPM_CRB; tc->get_version = tpm_crb_isa_get_version; tc->request_completed = tpm_crb_isa_request_completed; + adevc->build_dev_aml = build_tpm_crb_isa_aml; set_bit(DEVICE_CATEGORY_MISC, dc->categories); } @@ -139,6 +167,7 @@ static const TypeInfo tpm_crb_isa_info = { .class_init = tpm_crb_isa_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_TPM_IF }, + { TYPE_ACPI_DEV_AML_IF }, { } } };