From patchwork Mon Jul 31 16:21:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaoyao Li X-Patchwork-Id: 13335010 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D8CC3C001DC for ; Mon, 31 Jul 2023 16:35:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qQVqn-0005RZ-Eg; Mon, 31 Jul 2023 12:34:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qQVqH-0004uz-7S for qemu-devel@nongnu.org; Mon, 31 Jul 2023 12:34:02 -0400 Received: from [134.134.136.126] (helo=mgamail.intel.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qQVqF-0001QK-KD for qemu-devel@nongnu.org; Mon, 31 Jul 2023 12:33:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1690821235; x=1722357235; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aoypxCuYdLER3/LcqIyTOOIsOC8SNNr7NYzaoP86WMg=; b=dP8Szrz3D55SomKoE8kp+8s3H0YgsG9FHOOr2M60Z41ezZqiD7GgihCo GCueTWMish+ip2zPmj6+07KWDvexT51EhzYPvh6PYo2K7bThm8Er0usfA 1mfnIVCC8DFUi0wK8bKb1mJ63FUrenj/F7zVY/SSU9FlAjCTu2Ewhj52h A2ooCg/T6mMu6Gaq5LSU9PyOBSi5POQUk2Sh0gbADeoe9k0zo6R4O6YK+ 9hbiB0tjKN3x2Mx8JGNdkIdFu8nAy2E64qAbTW7oy4VB9EHZKP95GPWxN HWO9uRpcMJMqJnGjQVwZZ62s4GHXl5cBwmwWMM9JJcgEg2+MTzBZM1fqI A==; X-IronPort-AV: E=McAfee;i="6600,9927,10788"; a="353993623" X-IronPort-AV: E=Sophos;i="6.01,244,1684825200"; d="scan'208";a="353993623" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Jul 2023 09:26:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10788"; a="757984415" X-IronPort-AV: E=Sophos;i="6.01,244,1684825200"; d="scan'208";a="757984415" Received: from lxy-clx-4s.sh.intel.com ([10.239.48.46]) by orsmga008.jf.intel.com with ESMTP; 31 Jul 2023 09:26:06 -0700 From: Xiaoyao Li To: Paolo Bonzini , Sean Christopherson , David Hildenbrand , Igor Mammedov , "Michael S. Tsirkin" , Marcel Apfelbaum , Richard Henderson , Marcelo Tosatti Cc: Markus Armbruster , Eric Blake , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , =?utf-8?q?Phil?= =?utf-8?q?ippe_Mathieu-Daud=C3=A9?= , Peter Xu , Chao Peng , Michael Roth , isaku.yamahata@gmail.com, xiaoyao.li@intel.com, qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [RFC PATCH 17/19] pci-host/q35: Move PAM initialization above SMRAM initialization Date: Mon, 31 Jul 2023 12:21:59 -0400 Message-Id: <20230731162201.271114-18-xiaoyao.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230731162201.271114-1-xiaoyao.li@intel.com> References: <20230731162201.271114-1-xiaoyao.li@intel.com> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 134.134.136.126 (failed) Received-SPF: pass client-ip=134.134.136.126; envelope-from=xiaoyao.li@intel.com; helo=mgamail.intel.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Isaku Yamahata In mch_realize(), process PAM initialization before SMRAM initialization so that later patch can skill all the SMRAM related with a single check. Signed-off-by: Isaku Yamahata Signed-off-by: Xiaoyao Li --- hw/pci-host/q35.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 91c46df9ae31..ac1518a94ee4 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -575,6 +575,16 @@ static void mch_realize(PCIDevice *d, Error **errp) /* setup pci memory mapping */ pc_pci_as_mapping_init(mch->system_memory, mch->pci_address_space); + /* PAM */ + init_pam(&mch->pam_regions[0], OBJECT(mch), mch->ram_memory, + mch->system_memory, mch->pci_address_space, + PAM_BIOS_BASE, PAM_BIOS_SIZE); + for (i = 0; i < ARRAY_SIZE(mch->pam_regions) - 1; ++i) { + init_pam(&mch->pam_regions[i + 1], OBJECT(mch), mch->ram_memory, + mch->system_memory, mch->pci_address_space, + PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); + } + /* if *disabled* show SMRAM to all CPUs */ memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region", mch->pci_address_space, MCH_HOST_BRIDGE_SMRAM_C_BASE, @@ -641,15 +651,6 @@ static void mch_realize(PCIDevice *d, Error **errp) object_property_add_const_link(qdev_get_machine(), "smram", OBJECT(&mch->smram)); - - init_pam(&mch->pam_regions[0], OBJECT(mch), mch->ram_memory, - mch->system_memory, mch->pci_address_space, - PAM_BIOS_BASE, PAM_BIOS_SIZE); - for (i = 0; i < ARRAY_SIZE(mch->pam_regions) - 1; ++i) { - init_pam(&mch->pam_regions[i + 1], OBJECT(mch), mch->ram_memory, - mch->system_memory, mch->pci_address_space, - PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); - } } uint64_t mch_mcfg_base(void)