[for-8.2,1/3] pnv/lpc: Place mmio regs in their own memory region

Commit Message

Joel Stanley Aug. 8, 2023, 8:34 a.m. UTC

The P9 and P10 models re-used the xscom_regs memory region for the mmio
access, which is confusing.

Add a separate memory region in preparation for enabling both xscom and
mmio access.

Signed-off-by: Joel Stanley <[e-mail]>
---
 include/hw/ppc/pnv_lpc.h | 3 ++-
 hw/ppc/pnv.c             | 4 ++--
 hw/ppc/pnv_lpc.c         | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

Patch

diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
index 5d22c4557041..3000964f8999 100644
--- a/include/hw/ppc/pnv_lpc.h
+++ b/include/hw/ppc/pnv_lpc.h
@@ -81,8 +81,9 @@  struct PnvLpcController {
     uint32_t lpc_hc_irqstat;
     uint32_t lpc_hc_error_addr;
 
-    /* XSCOM registers */
+    /* Registers */
     MemoryRegion xscom_regs;
+    MemoryRegion mmio_regs;
 
     /* PSI to generate interrupts */
     qemu_irq psi_irq;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index eb54f93986df..afdaa25c2b26 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1565,7 +1565,7 @@  static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
         return;
     }
     memory_region_add_subregion(get_system_memory(), PNV9_LPCM_BASE(chip),
-                                &chip9->lpc.xscom_regs);
+                                &chip9->lpc.mmio_regs);
 
     chip->fw_mr = &chip9->lpc.isa_fw;
     chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
@@ -1784,7 +1784,7 @@  static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
         return;
     }
     memory_region_add_subregion(get_system_memory(), PNV10_LPCM_BASE(chip),
-                                &chip10->lpc.xscom_regs);
+                                &chip10->lpc.mmio_regs);
 
     chip->fw_mr = &chip10->lpc.isa_fw;
     chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0",
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index d692858bee78..caf5e10a5f96 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -664,7 +664,7 @@  static void pnv_lpc_power9_realize(DeviceState *dev, Error **errp)
     }
 
     /* P9 uses a MMIO region */
-    memory_region_init_io(&lpc->xscom_regs, OBJECT(lpc), &pnv_lpc_mmio_ops,
+    memory_region_init_io(&lpc->mmio_regs, OBJECT(lpc), &pnv_lpc_mmio_ops,
                           lpc, "lpcm", PNV9_LPCM_SIZE);
 }