[v2] qemu/timer: Add host ticks function for RISC-V

Commit Message

LIU Zhiwei Sept. 11, 2023, 6:32 a.m. UTC

Signed-off-by: LIU Zhiwei <[e-mail]>
---
v2:
 1) Use rdtime instead of rdcycle for dynamic cpuclk adjustment.
 2) Read timeh twice in case of time overflow for 32-bit cpu.
---
 include/qemu/timer.h | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

Patch

diff --git a/include/qemu/timer.h b/include/qemu/timer.h
index 9a91cb1248..9a366e551f 100644
--- a/include/qemu/timer.h
+++ b/include/qemu/timer.h
@@ -979,6 +979,28 @@  static inline int64_t cpu_get_host_ticks(void)
     return cur - ofs;
 }
 
+#elif defined(__riscv) && __riscv_xlen == 32
+static inline int64_t cpu_get_host_ticks(void)
+{
+    uint32_t lo, hi, tmph;
+    do {
+        asm volatile("RDTIMEH %0\n\t"
+                     "RDTIME %1\n\t"
+                     "RDTIMEH %2"
+                     : "=r"(hi), "=r"(lo), "=r"(tmph));
+    } while (unlikely(tmph != hi));
+    return lo | (uint64_t)hi << 32;
+}
+
+#elif defined(__riscv) && __riscv_xlen > 32
+static inline int64_t cpu_get_host_ticks(void)
+{
+    int64_t val;
+
+    asm volatile("RDTIME %0" : "=r"(val));
+    return val;
+}
+
 #else
 /* The host CPU doesn't have an easily accessible cycle counter.
    Just return a monotonically increasing value.  This will be