diff mbox series

[PULL,16/21] tests/tcg/tricore: Add test from 'and' to 'csub'

Message ID 20230927093552.493279-17-kbastian@mail.uni-paderborn.de (mailing list archive)
State New, archived
Headers show
Series [PULL,01/21] tests/tcg/tricore: Bump cpu to tc37x | expand

Commit Message

Bastian Koppelmann Sept. 27, 2023, 9:35 a.m. UTC 
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230913105326.40832-6-kbastian@mail.uni-paderborn.de>
---
 tests/tcg/tricore/asm/macros.h     | 11 +++++++
 tests/tcg/tricore/asm/test_arith.S | 47 ++++++++++++++++++++++++++++++
 2 files changed, 58 insertions(+)
diff mbox series

Patch

diff --git a/tests/tcg/tricore/asm/macros.h b/tests/tcg/tricore/asm/macros.h
index 8ed2249b0d..3000e15590 100644
--- a/tests/tcg/tricore/asm/macros.h
+++ b/tests/tcg/tricore/asm/macros.h
@@ -117,6 +117,11 @@  test_ ## num:                                                    \
     insn DREG_CALC_RESULT, imm;               \
     )
 
+#define TEST_D15_I(insn, num, result, imm)      \
+    TEST_CASE(num, %d15, result,  \
+    insn %d15, imm;               \
+    )
+
 #define TEST_D_DDD(insn, num, result, rs1, rs2, rs3)        \
     TEST_CASE(num, DREG_CALC_RESULT, result,                \
     LI(DREG_RS1, rs1);                                      \
@@ -236,6 +241,12 @@  test_ ## num:                                                    \
     insn DREG_CALC_RESULT, DREG_RS1, imm1, imm2, imm3;       \
     )
 
+#define TEST_E_D(insn, num, res_lo, res_hi, rs1) \
+    TEST_CASE_E(num, res_lo, res_hi,             \
+    LI(DREG_RS1, rs1);                           \
+    insn EREG_CALC_RESULT, DREG_RS1;             \
+    )
+
 #define TEST_E_ED(insn, num, res_hi, res_lo, rs1_hi, rs1_lo, rs2) \
     TEST_CASE_E(num, res_lo, res_hi,                              \
     LI(EREG_RS1_LO, rs1_lo);                                      \
diff --git a/tests/tcg/tricore/asm/test_arith.S b/tests/tcg/tricore/asm/test_arith.S
index 07c4b876e9..ec87413777 100644
--- a/tests/tcg/tricore/asm/test_arith.S
+++ b/tests/tcg/tricore/asm/test_arith.S
@@ -37,5 +37,52 @@  _start:
     TEST_D_DD(adds.u, 33, 0xffffffff, 0xd4a91e39 ,0x55b1baed )
     TEST_D_DI(addx, 34, 0x38f63b5, 0x38f632b ,0x8a )
     TEST_D_DD(addx, 35, 0x8b9da5a4, 0x16e32e7 ,0x8a2f72bd )
+    TEST_D_DI(and, 36, 0x1, 0xf9683907 ,0x69 )
+    TEST_D_DD(and, 37, 0x40102090, 0x48d86c91 ,0x511123d0 )
+    TEST_D15_I(and, 38, 0x0, 0x1a )
+    TEST_D_D(and, 39, 0x0, 0x551343d6 )
+    TEST_D_DIDI(and.and.t, 40, 0x0, 0x60343d14 ,0x4 ,0x922020d8 ,0x3 )
+    TEST_D_DIDI(and.andn.t, 41, 0x0, 0xd4f95dad ,0x5 ,0xb9fff576 ,0x3 )
+    TEST_D_DI(and.eq, 42, 0x0, 0x9945aaf ,0xf )
+    TEST_D_DD(and.eq, 43, 0x0, 0x32a94b38 ,0xf53b9463 )
+    TEST_D_DI(and.ge, 44, 0x0, 0xe66d0f6e ,0x55 )
+    TEST_D_DD(and.ge, 45, 0x0, 0x43ea87d0 ,0x5adacf4d )
+    TEST_D_DI(and.ge.u, 46, 0x0, 0x4bef5bd1 ,0xb3 )
+    TEST_D_DD(and.ge.u, 47, 0x0, 0x9b5504c2 ,0x3787f19 )
+    TEST_D_DI(and.lt, 48, 0x0, 0x36daf216 ,0xc8 )
+    TEST_D_DD(and.lt, 49, 0x0, 0x6bf175f7 ,0x769bc7db )
+    TEST_D_DI(and.lt.u, 50, 0x0, 0xbef4b04a ,0x1d )
+    TEST_D_DD(and.lt.u, 51, 0x0, 0xa89ea455 ,0x84dc9898 )
+    TEST_D_DI(and.ne, 52, 0x0, 0xf3bb3559 ,0x5e )
+    TEST_D_DD(and.ne, 53, 0x0, 0xa05258eb ,0x50c5b0e4 )
+    TEST_D_DIDI(and.nor.t, 54, 0x0, 0xd7534767 ,0x1 ,0x5fac529f ,0x6 )
+    TEST_D_DIDI(and.or.t, 55, 0x0, 0xa3dd1690 ,0x7 ,0xe25f7361 ,0x4 )
+    TEST_D_DIDI(and.t, 56, 0x0, 0x9f6f71d5 ,0x1 ,0xe9dfe144 ,0x2 )
+    TEST_D_DI(andn, 57, 0xb2ed0c01, 0xb2ed0cf1 ,0xfc )
+    TEST_D_DD(andn, 58, 0x102d884, 0x494ad98c ,0xf87d077a )
+    TEST_D_DIDI(andn.t, 59, 0x0, 0x24ef957a ,0x5 ,0xaf95e01e ,0x4 )
+    TEST_D_DD(bmerge, 60, 0xbfe56f84, 0x2a0fc78 ,0xf7127bb2 )
+    TEST_E_D(bsplit, 61, 0x1ae2, 0xef60, 0xa9ee7c04 )
+    TEST_D_DDI(cadd, 62, 0x3ac01dec, 0x7770d9a ,0x3ac01d3d ,0xaf )
+    TEST_D_DDD(cadd, 63, 0x48a771b4, 0xdf020dda ,0xb81cdead ,0x908a9307 )
+    TEST_D_D15I(cadd, 64, 0x4, 0x6a766c11 ,0x4 )
+    TEST_D_DDI(caddn, 65, 0xdc0cd85d, 0xfe1fbf45 ,0xdc0cd85d ,0x1c )
+    TEST_D_DDD(caddn, 66, 0xd7bd5cb5, 0x70a930bd ,0xd7bd5cb5 ,0xb5dce80d )
+    TEST_D_D15I(caddn, 67, 0x0, 0xb6051252 ,0x4 )
+    TEST_D_D(clo, 68, 0x1, 0xa15f7ebc )
+    TEST_D_D(clo.h, 69, 0x0, 0x2bf418ef )
+    TEST_D_D(cls, 70, 0x1, 0xcbda5b50 )
+    TEST_D_D(cls.h, 71, 0x10001, 0xd15ac540 )
+    TEST_D_D(clz, 72, 0x1, 0x62ddf743 )
+    TEST_D_D(clz.h, 73, 0x0, 0xa859df54 )
+    TEST_D_D15I(cmov, 74, 0x5, 0x7d06b438 ,0x5 )
+    TEST_D_D15D(cmov, 75, 0x4d24e162, 0xd07651a5 ,0x4d24e162 )
+    TEST_D_D15I(cmovn, 76, 0x0, 0xea576d5 ,0x6 )
+    TEST_D_D15D(cmovn, 77, 0x0, 0x6a1d2b48 ,0xb28bc831 )
+    TEST_D_DD(crc32.b, 78, 0x3baca290, 0xcde828a2 ,0x869b2ea4 )
+    TEST_D_DD(crc32b.w, 79, 0x7f9d8908, 0xdaf396a5 ,0xa9011cf2 )
+    TEST_D_DD(crc32l.w, 80, 0x1707579b, 0x87572060 ,0x8cdfa395 )
+    TEST_D_DDD(csub, 81, 0xf389f12f, 0xae9c7e04 ,0x63247211 ,0x6f9a80e2 )
+    TEST_D_DDD(csubn, 82, 0x2a7dd20d, 0xc39caf46 ,0x2a7dd20d ,0xa8ab6269 )
 
     TEST_PASSFAIL