From patchwork Tue Oct 31 04:00:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joelle van Dyne X-Patchwork-Id: 13441012 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 213B5C4167D for ; Tue, 31 Oct 2023 04:02:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qxfw2-0001PA-Go; Tue, 31 Oct 2023 00:00:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qxfvt-0001MN-6I; Tue, 31 Oct 2023 00:00:49 -0400 Received: from mail-pl1-f173.google.com ([209.85.214.173]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qxfvn-0005GH-2A; Tue, 31 Oct 2023 00:00:45 -0400 Received: by mail-pl1-f173.google.com with SMTP id d9443c01a7336-1cc53d0030fso12061865ad.0; Mon, 30 Oct 2023 21:00:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698724840; x=1699329640; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q1an1MgDw8mr1gx6lXF1ti/344eGgybPK9SlmS/LDhI=; b=XRYVY73wq7F9oyQgkQze3h1dEFyKDmvavfak8CYphZbVecoG4zkSPV8rDRg5/fB4gQ 4921lTwZmMeMb8I3HEDVbJ5iC/S2sG5/PzojwoRubiOC0cL95bbxgnFpO3is5qzV4FoQ R+XrwAHju1T84NgEFiq1oP7XNRXkpIcwRn05QqQTG0/INTgk9ZaerWplHuTFZZZTmzq+ cwbiyANot2+AX95OvJzuwu5N1NP0fPTF1b64KlMRprhBX7GDQp/V70o5H27Z3tFzrTNu VGB+3bdZlSCmwX0ar3gPkmGj15tH3P0DEuSLoMz9RB3inKgbxLwNz7NguBTUcuRsuY6I 03Tg== X-Gm-Message-State: AOJu0YzMr7uxdzey+JBe5Z+7PYm2xXmfoWc5S4aFG0yR5f9khsE3c9Jb PBkhzVwEwDt/G7eEffdUX87gxEpiEkq6/w== X-Google-Smtp-Source: AGHT+IHQOxUNJma02sn6IgFVilNOCGB14qOd5LLKeC2m3TaWw1aDwg4XbD+5NaqG5kAm7zx7Md39ug== X-Received: by 2002:a17:902:d111:b0:1cc:32df:427a with SMTP id w17-20020a170902d11100b001cc32df427amr1524061plw.27.1698724839788; Mon, 30 Oct 2023 21:00:39 -0700 (PDT) Received: from localhost.localdomain ([2601:642:4c02:7b37:49a8:6e6e:cee6:cee7]) by smtp.gmail.com with ESMTPSA id h4-20020a170902f54400b001bbfa86ca3bsm257975plf.78.2023.10.30.21.00.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Oct 2023 21:00:39 -0700 (PDT) From: Joelle van Dyne To: qemu-devel@nongnu.org Cc: Joelle van Dyne , Stefan Berger , "Michael S. Tsirkin" , Igor Mammedov , Ani Sinha , Shannon Zhao , Peter Maydell , Song Gao , Stefan Berger , qemu-arm@nongnu.org (open list:ARM ACPI Subsystem) Subject: [PATCH v4 09/14] tpm_tis_sysbus: move DSDT AML generation to device Date: Mon, 30 Oct 2023 21:00:12 -0700 Message-ID: <20231031040021.65582-10-j@getutm.app> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231031040021.65582-1-j@getutm.app> References: <20231031040021.65582-1-j@getutm.app> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.214.173; envelope-from=osy86dev@gmail.com; helo=mail-pl1-f173.google.com X-Spam_score_int: -13 X-Spam_score: -1.4 X-Spam_bar: - X-Spam_report: (-1.4 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This reduces redundant code in different machine types with ACPI table generation. Additionally, this will allow us to support different TPM interfaces with the same AML logic. Finally, this matches up with the TPM TIS ISA implementation. Ideally, we would be able to call `qbus_build_aml` and avoid any TPM specific code in the ACPI table generation. However, currently we still have to call `build_tpm2` anyways and it does not look like most other ACPI devices support the `ACPI_DEV_AML_IF` interface. Signed-off-by: Joelle van Dyne Reviewed-by: Stefan Berger --- hw/arm/virt-acpi-build.c | 38 ++------------------------------------ hw/loongarch/acpi-build.c | 38 ++------------------------------------ hw/tpm/tpm_tis_sysbus.c | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 41 insertions(+), 72 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9ce136cd88..3efbe6bd09 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -35,6 +35,7 @@ #include "target/arm/cpu.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/nvram/fw_cfg.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/acpi/aml-build.h" @@ -208,41 +209,6 @@ static void acpi_dsdt_add_gpio(Aml *scope, const MemMapEntry *gpio_memmap, aml_append(scope, dev); } -#ifdef CONFIG_TPM -static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) -{ - PlatformBusDevice *pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev); - hwaddr pbus_base = vms->memmap[VIRT_PLATFORM_BUS].base; - SysBusDevice *sbdev = SYS_BUS_DEVICE(tpm_find()); - MemoryRegion *sbdev_mr; - hwaddr tpm_base; - - if (!sbdev) { - return; - } - - tpm_base = platform_bus_get_mmio_addr(pbus, sbdev, 0); - assert(tpm_base != -1); - - tpm_base += pbus_base; - - sbdev_mr = sysbus_mmio_get_region(sbdev, 0); - - Aml *dev = aml_device("TPM0"); - aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); - aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device"))); - aml_append(dev, aml_name_decl("_UID", aml_int(0))); - - Aml *crs = aml_resource_template(); - aml_append(crs, - aml_memory32_fixed(tpm_base, - (uint32_t)memory_region_size(sbdev_mr), - AML_READ_WRITE)); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); -} -#endif - #define ID_MAPPING_ENTRY_SIZE 20 #define SMMU_V3_ENTRY_SIZE 68 #define ROOT_COMPLEX_ENTRY_SIZE 36 @@ -891,7 +857,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) acpi_dsdt_add_power_button(scope); #ifdef CONFIG_TPM - acpi_dsdt_add_tpm(scope, vms); + call_dev_aml_func(DEVICE(tpm_find()), scope); #endif aml_append(dsdt, scope); diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c index ae292fc543..1969bfc8f9 100644 --- a/hw/loongarch/acpi-build.c +++ b/hw/loongarch/acpi-build.c @@ -14,6 +14,7 @@ #include "target/loongarch/cpu.h" #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" +#include "hw/acpi/acpi_aml_interface.h" #include "hw/nvram/fw_cfg.h" #include "hw/acpi/bios-linker-loader.h" #include "migration/vmstate.h" @@ -328,41 +329,6 @@ static void build_flash_aml(Aml *scope, LoongArchMachineState *lams) aml_append(scope, dev); } -#ifdef CONFIG_TPM -static void acpi_dsdt_add_tpm(Aml *scope, LoongArchMachineState *vms) -{ - PlatformBusDevice *pbus = PLATFORM_BUS_DEVICE(vms->platform_bus_dev); - hwaddr pbus_base = VIRT_PLATFORM_BUS_BASEADDRESS; - SysBusDevice *sbdev = SYS_BUS_DEVICE(tpm_find()); - MemoryRegion *sbdev_mr; - hwaddr tpm_base; - - if (!sbdev) { - return; - } - - tpm_base = platform_bus_get_mmio_addr(pbus, sbdev, 0); - assert(tpm_base != -1); - - tpm_base += pbus_base; - - sbdev_mr = sysbus_mmio_get_region(sbdev, 0); - - Aml *dev = aml_device("TPM0"); - aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); - aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device"))); - aml_append(dev, aml_name_decl("_UID", aml_int(0))); - - Aml *crs = aml_resource_template(); - aml_append(crs, - aml_memory32_fixed(tpm_base, - (uint32_t)memory_region_size(sbdev_mr), - AML_READ_WRITE)); - aml_append(dev, aml_name_decl("_CRS", crs)); - aml_append(scope, dev); -} -#endif - /* build DSDT */ static void build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine) @@ -379,7 +345,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine) build_la_ged_aml(dsdt, machine); build_flash_aml(dsdt, lams); #ifdef CONFIG_TPM - acpi_dsdt_add_tpm(dsdt, lams); + call_dev_aml_func(DEVICE(tpm_find()), dsdt); #endif /* System State Package */ scope = aml_scope("\\"); diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c index 2fc550f119..462b0e1571 100644 --- a/hw/tpm/tpm_tis_sysbus.c +++ b/hw/tpm/tpm_tis_sysbus.c @@ -30,6 +30,7 @@ #include "hw/sysbus.h" #include "tpm_tis.h" #include "qom/object.h" +#include "hw/acpi/acpi_aml_interface.h" struct TPMStateSysBus { /*< private >*/ @@ -37,6 +38,8 @@ struct TPMStateSysBus { /*< public >*/ TPMState state; /* not a QOM object */ + uint64_t baseaddr; + uint64_t size; }; OBJECT_DECLARE_SIMPLE_TYPE(TPMStateSysBus, TPM_TIS_SYSBUS) @@ -93,6 +96,10 @@ static void tpm_tis_sysbus_reset(DeviceState *dev) static Property tpm_tis_sysbus_properties[] = { DEFINE_PROP_UINT32("irq", TPMStateSysBus, state.irq_num, TPM_TIS_IRQ), DEFINE_PROP_TPMBE("tpmdev", TPMStateSysBus, state.be_driver), + DEFINE_PROP_UINT64("x-baseaddr", TPMStateSysBus, baseaddr, + TPM_TIS_ADDR_BASE), + DEFINE_PROP_UINT64("x-size", TPMStateSysBus, size, + TPM_TIS_ADDR_SIZE), DEFINE_PROP_END_OF_LIST(), }; @@ -125,10 +132,38 @@ static void tpm_tis_sysbus_realizefn(DeviceState *dev, Error **errp) } } +static void build_tpm_tis_sysbus_aml(AcpiDevAmlIf *adev, Aml *scope) +{ + Aml *dev, *crs; + TPMStateSysBus *sbdev = TPM_TIS_SYSBUS(adev); + TPMIf *ti = TPM_IF(sbdev); + + dev = aml_device("TPM"); + if (tpm_tis_sysbus_get_tpm_version(ti) == TPM_VERSION_2_0) { + aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101"))); + aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device"))); + } else { + aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0C31"))); + } + aml_append(dev, aml_name_decl("_UID", aml_int(0))); + aml_append(dev, aml_name_decl("_STA", aml_int(0xF))); + crs = aml_resource_template(); + aml_append(crs, aml_memory32_fixed(sbdev->baseaddr, sbdev->size, + AML_READ_WRITE)); + /* + * FIXME: TPM_TIS_IRQ=5 conflicts with PNP0C0F irqs, + * fix default TPM_TIS_IRQ value there to use some unused IRQ + */ + /* aml_append(crs, aml_irq_no_flags(sbdev->state.irq_num)); */ + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + static void tpm_tis_sysbus_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); TPMIfClass *tc = TPM_IF_CLASS(klass); + AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); device_class_set_props(dc, tpm_tis_sysbus_properties); dc->vmsd = &vmstate_tpm_tis_sysbus; @@ -139,6 +174,7 @@ static void tpm_tis_sysbus_class_init(ObjectClass *klass, void *data) tc->request_completed = tpm_tis_sysbus_request_completed; tc->get_version = tpm_tis_sysbus_get_tpm_version; set_bit(DEVICE_CATEGORY_MISC, dc->categories); + adevc->build_dev_aml = build_tpm_tis_sysbus_aml; } static const TypeInfo tpm_tis_sysbus_info = { @@ -149,6 +185,7 @@ static const TypeInfo tpm_tis_sysbus_info = { .class_init = tpm_tis_sysbus_class_init, .interfaces = (InterfaceInfo[]) { { TYPE_TPM_IF }, + { TYPE_ACPI_DEV_AML_IF }, { } } };