diff mbox series

[v5,19/31] target/sh4: Use generic cpu_list()

Message ID 20231114235628.534334-20-gshan@redhat.com (mailing list archive)
State New, archived
Headers show
Series Unified CPU type check | expand

Commit Message

Gavin Shan Nov. 14, 2023, 11:56 p.m. UTC
Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
sh7750r
sh7751r
sh7785

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
Available CPUs:
  sh7750r
  sh7751r
  sh7785

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/sh4/cpu.c | 17 -----------------
 target/sh4/cpu.h |  3 ---
 2 files changed, 20 deletions(-)

Comments

Richard Henderson Nov. 15, 2023, 1:08 a.m. UTC | #1
On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> sh7750r
> sh7751r
> sh7785
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> Available CPUs:
>    sh7750r
>    sh7751r
>    sh7785
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/sh4/cpu.c | 17 -----------------
>   target/sh4/cpu.h |  3 ---
>   2 files changed, 20 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Philippe Mathieu-Daudé Nov. 16, 2023, 7:55 a.m. UTC | #2
On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> sh7750r
> sh7751r
> sh7785
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> Available CPUs:
>    sh7750r
>    sh7751r
>    sh7785
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/sh4/cpu.c | 17 -----------------
>   target/sh4/cpu.h |  3 ---
>   2 files changed, 20 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff mbox series

Patch

diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index a8ec98b134..806a0ef875 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -122,23 +122,6 @@  static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
     info->print_insn = print_insn_sh;
 }
 
-static void superh_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    const char *typename = object_class_get_name(OBJECT_CLASS(data));
-    int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
-
-    qemu_printf("%.*s\n", len, typename);
-}
-
-void sh4_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false);
-    g_slist_foreach(list, superh_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 360eac1fbe..e6fc6b87d4 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -238,7 +238,6 @@  G_NORETURN void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
                                                uintptr_t retaddr);
 
 void sh4_translate_init(void);
-void sh4_cpu_list(void);
 
 #if !defined(CONFIG_USER_ONLY)
 hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
@@ -272,8 +271,6 @@  void cpu_load_tlb(CPUSH4State * env);
 
 #define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
 
-#define cpu_list sh4_cpu_list
-
 /* MMU modes definitions */
 #define MMU_USER_IDX 1
 static inline int cpu_mmu_index (CPUSH4State *env, bool ifetch)