| Message ID | 20231208003754.3688038-2-iii@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | accel/tcg: Move perf and debuginfo support to tcg | expand |
On 8/12/23 01:35, Ilya Leoshkevich wrote: > Currently qemu_target_page_mask() is usable only from the softmmu > code. Make it possible to use it from the *-user code as well. > > Make use of it in perf.c. > > Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> > --- > accel/tcg/perf.c | 3 ++- > system/physmem.c | 5 ----- > target/meson.build | 2 ++ > target/target-common.c | 10 ++++++++++ > 4 files changed, 14 insertions(+), 6 deletions(-) > create mode 100644 target/target-common.c > diff --git a/target/meson.build b/target/meson.build > index a53a60486fc..dee2ac47e02 100644 > --- a/target/meson.build > +++ b/target/meson.build > @@ -19,3 +19,5 @@ subdir('sh4') > subdir('sparc') > subdir('tricore') > subdir('xtensa') > + > +specific_ss.add(files('target-common.c')) > diff --git a/target/target-common.c b/target/target-common.c > new file mode 100644 > index 00000000000..903b10cfe4b > --- /dev/null > +++ b/target/target-common.c > @@ -0,0 +1,10 @@ > +/* SPDX-License-Identifier: GPL-2.0-or-later */ > +#include "qemu/osdep.h" > + > +#include "cpu.h" > +#include "exec/target_page.h" > + > +int qemu_target_page_mask(void) > +{ > + return TARGET_PAGE_MASK; > +} FYI I carry this patch and am going to post it soon: -- >8 -- diff --git a/meson.build b/meson.build index d2c4c2adb3..5fdc4ef8db 100644 --- a/meson.build +++ b/meson.build @@ -3488,7 +3488,7 @@ if get_option('b_lto') pagevary = declare_dependency(link_with: pagevary) endif common_ss.add(pagevary) -specific_ss.add(files('page-vary-target.c')) +specific_ss.add(files('page-target.c', 'page-vary-target.c')) subdir('backends') subdir('disas') diff --git a/page-target.c b/page-target.c new file mode 100644 index 0000000000..d286e2d58b --- /dev/null +++ b/page-target.c @@ -0,0 +1,43 @@ +/* + * QEMU page values getters (target independent) + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "exec/target_page.h" +#include "exec/cpu-defs.h" +#include "exec/cpu-all.h" + +size_t qemu_target_page_size(void) +{ + return TARGET_PAGE_SIZE; +} + +int qemu_target_page_mask(void) +{ + return TARGET_PAGE_MASK; +} + +int qemu_target_page_bits(void) +{ + return TARGET_PAGE_BITS; +} + +int qemu_target_page_bits_min(void) +{ + return TARGET_PAGE_BITS_MIN; +} + +/* Convert target pages to MiB (2**20). */ +size_t qemu_target_pages_to_MiB(size_t pages) +{ + int page_bits = TARGET_PAGE_BITS; + + /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ + g_assert(page_bits < 20); + + return pages >> (20 - page_bits); +} diff --git a/system/physmem.c b/system/physmem.c index a63853a7bc..4bdb3d0592 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3422,41 +3422,6 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, return 0; } -/* - * Allows code that needs to deal with migration bitmaps etc to still be built - * target independent. - */ -size_t qemu_target_page_size(void) -{ - return TARGET_PAGE_SIZE; -} - -int qemu_target_page_mask(void) -{ - return TARGET_PAGE_MASK; -} - -int qemu_target_page_bits(void) -{ - return TARGET_PAGE_BITS; -} - -int qemu_target_page_bits_min(void) -{ - return TARGET_PAGE_BITS_MIN; -} - -/* Convert target pages to MiB (2**20). */ -size_t qemu_target_pages_to_MiB(size_t pages) -{ - int page_bits = TARGET_PAGE_BITS; - - /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ - g_assert(page_bits < 20); - - return pages >> (20 - page_bits); -} - bool cpu_physical_memory_is_io(hwaddr phys_addr) { MemoryRegion*mr; ---
diff --git a/accel/tcg/perf.c b/accel/tcg/perf.c index cd1aa99a7ee..ba75c1bbe45 100644 --- a/accel/tcg/perf.c +++ b/accel/tcg/perf.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "elf.h" +#include "exec/target_page.h" #include "exec/exec-all.h" #include "qemu/timer.h" #include "tcg/tcg.h" @@ -335,7 +336,7 @@ void perf_report_code(uint64_t guest_pc, TranslationBlock *tb, /* FIXME: This replicates the restore_state_to_opc() logic. */ q[insn].address = gen_insn_data[insn * start_words + 0]; if (tb_cflags(tb) & CF_PCREL) { - q[insn].address |= (guest_pc & TARGET_PAGE_MASK); + q[insn].address |= (guest_pc & qemu_target_page_mask()); } else { #if defined(TARGET_I386) q[insn].address -= tb->cs_base; diff --git a/system/physmem.c b/system/physmem.c index a63853a7bc9..7cf4a735c3b 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3431,11 +3431,6 @@ size_t qemu_target_page_size(void) return TARGET_PAGE_SIZE; } -int qemu_target_page_mask(void) -{ - return TARGET_PAGE_MASK; -} - int qemu_target_page_bits(void) { return TARGET_PAGE_BITS; diff --git a/target/meson.build b/target/meson.build index a53a60486fc..dee2ac47e02 100644 --- a/target/meson.build +++ b/target/meson.build @@ -19,3 +19,5 @@ subdir('sh4') subdir('sparc') subdir('tricore') subdir('xtensa') + +specific_ss.add(files('target-common.c')) diff --git a/target/target-common.c b/target/target-common.c new file mode 100644 index 00000000000..903b10cfe4b --- /dev/null +++ b/target/target-common.c @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include "qemu/osdep.h" + +#include "cpu.h" +#include "exec/target_page.h" + +int qemu_target_page_mask(void) +{ + return TARGET_PAGE_MASK; +}
Currently qemu_target_page_mask() is usable only from the softmmu code. Make it possible to use it from the *-user code as well. Make use of it in perf.c. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> --- accel/tcg/perf.c | 3 ++- system/physmem.c | 5 ----- target/meson.build | 2 ++ target/target-common.c | 10 ++++++++++ 4 files changed, 14 insertions(+), 6 deletions(-) create mode 100644 target/target-common.c