| Message ID | 20240325083346.16656-3-jason.chien@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: Support Zve32x and Zve64x extensions | expand |
I think this patch should be squashed into patch 1. Patch 1 as is does nothing since there's no way of enabling the flag without this patch. Same thing with patch 4: I think it should be squashed into patch 3. Thanks, Daniel On 3/25/24 05:33, Jason Chien wrote: > Signed-off-by: Jason Chien <jason.chien@sifive.com> > Reviewed-by: Frank Chang <frank.chang@sifive.com> > Reviewed-by: Max Chou <max.chou@sifive.com> > --- > target/riscv/cpu.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 851ac7372c..6bd8798bb5 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1473,6 +1473,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > MULTI_EXT_CFG_BOOL("zfh", ext_zfh, false), > MULTI_EXT_CFG_BOOL("zfhmin", ext_zfhmin, false), > MULTI_EXT_CFG_BOOL("zve32f", ext_zve32f, false), > + MULTI_EXT_CFG_BOOL("zve32x", ext_zve32x, false), > MULTI_EXT_CFG_BOOL("zve64f", ext_zve64f, false), > MULTI_EXT_CFG_BOOL("zve64d", ext_zve64d, false), > MULTI_EXT_CFG_BOOL("zvfbfmin", ext_zvfbfmin, false),
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 851ac7372c..6bd8798bb5 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1473,6 +1473,7 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { MULTI_EXT_CFG_BOOL("zfh", ext_zfh, false), MULTI_EXT_CFG_BOOL("zfhmin", ext_zfhmin, false), MULTI_EXT_CFG_BOOL("zve32f", ext_zve32f, false), + MULTI_EXT_CFG_BOOL("zve32x", ext_zve32x, false), MULTI_EXT_CFG_BOOL("zve64f", ext_zve64f, false), MULTI_EXT_CFG_BOOL("zve64d", ext_zve64d, false), MULTI_EXT_CFG_BOOL("zvfbfmin", ext_zvfbfmin, false),