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Sun, 5 May 2024 16:06:06 +0200 (CEST) Received: from inesv-Inspiron-3501.enst.fr (unknown [IPv6:2a04:8ec0:0:124::190c]) by zproxy3.enst.fr (Postfix) with ESMTPSA id A96F1A072C; Sun, 5 May 2024 16:06:05 +0200 (CEST) From: =?utf-8?q?In=C3=A8s_Varhol?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Thomas Huth , Arnaud Minier , Laurent Vivier , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?In=C3=A8s_Varhol?= , Peter Maydell , Alistair Francis , Samuel Tardieu , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Paolo Bonzini Subject: [PATCH 3/4] hw/char: Add QOM property for STM32L4x5 USART clock frequency Date: Sun, 5 May 2024 16:05:05 +0200 Message-ID: <20240505140556.373711-4-ines.varhol@telecom-paris.fr> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240505140556.373711-1-ines.varhol@telecom-paris.fr> References: <20240505140556.373711-1-ines.varhol@telecom-paris.fr> MIME-Version: 1.0 Received-SPF: pass client-ip=137.194.2.222; envelope-from=ines.varhol@telecom-paris.fr; helo=zproxy3.enst.fr X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Inès Varhol --- hw/char/stm32l4x5_usart.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c index fc5dcac0c4..ee7727481c 100644 --- a/hw/char/stm32l4x5_usart.c +++ b/hw/char/stm32l4x5_usart.c @@ -26,6 +26,7 @@ #include "hw/clock.h" #include "hw/irq.h" #include "hw/qdev-clock.h" +#include "qapi/visitor.h" #include "hw/qdev-properties.h" #include "hw/qdev-properties-system.h" #include "hw/registerfields.h" @@ -523,6 +524,14 @@ static Property stm32l4x5_usart_base_properties[] = { DEFINE_PROP_END_OF_LIST(), }; +static void clock_freq_get(Object *obj, Visitor *v, + const char *name, void *opaque, Error **errp) +{ + Stm32l4x5UsartBaseState *s = STM32L4X5_USART_BASE(obj); + uint32_t clock_freq_hz = clock_get_hz(s->clk); + visit_type_uint32(v, name, &clock_freq_hz, errp); +} + static void stm32l4x5_usart_base_init(Object *obj) { Stm32l4x5UsartBaseState *s = STM32L4X5_USART_BASE(obj); @@ -534,6 +543,9 @@ static void stm32l4x5_usart_base_init(Object *obj) sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0); + + object_property_add(obj, "clock-freq-hz", "uint32", + clock_freq_get, NULL, NULL, NULL); } static int stm32l4x5_usart_base_post_load(void *opaque, int version_id)