| Message ID | 20240520103329.381158-6-harshpb@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/ppc: misc ppc improvements/optimizations | expand |
On Mon, 20 May 2024, Harsh Prateek Bora wrote: > Historically, the registration of sprs have been inherited alongwith > every new Power arch support being added leading to a lot of code > duplication. It's time to do necessary cleanups now to avoid further > duplication with newer arch support being added. > > Signed-off-by: Harsh Prateek Bora <harshb@linux.ibm.com> > --- > target/ppc/cpu_init.c | 43 +++++++++---------------------------------- > 1 file changed, 9 insertions(+), 34 deletions(-) > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index 6d82f24c87..636e12ba7a 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -6307,7 +6307,7 @@ static struct ppc_radix_page_info POWER9_radix_page_info = { > }; > #endif /* CONFIG_USER_ONLY */ > > -static void init_proc_POWER9(CPUPPCState *env) > +static inline void register_power9_common_sprs(CPUPPCState *env) QEMU conventions recommend not adding inline in C files and let the compiler decide about that. The inline may only be needed for functions defined in a header that are meant to be inlined in multiple files. So I think no inline is needed here. (I don't know if this is documented but I saw that in Richard Hendersons's reviews multiple times.) Regards, BALATON Zoltan > { > /* Common Registers */ > init_proc_book3s_common(env); > @@ -6326,7 +6326,6 @@ static void init_proc_POWER9(CPUPPCState *env) > register_power5p_ear_sprs(env); > register_power5p_tb_sprs(env); > register_power6_common_sprs(env); > - register_HEIR32_spr(env); > register_power6_dbg_sprs(env); > register_power8_tce_address_control_sprs(env); > register_power8_ids_sprs(env); > @@ -6342,6 +6341,12 @@ static void init_proc_POWER9(CPUPPCState *env) > register_power9_book4_sprs(env); > register_power8_rpr_sprs(env); > register_power9_mmu_sprs(env); > +} > + > +static void init_proc_POWER9(CPUPPCState *env) > +{ > + register_power9_common_sprs(env); > + register_HEIR32_spr(env); > > /* POWER9 Specific registers */ > spr_register_kvm(env, SPR_TIDR, "TIDR", NULL, NULL, > @@ -6499,39 +6504,9 @@ static struct ppc_radix_page_info POWER10_radix_page_info = { > > static void init_proc_POWER10(CPUPPCState *env) > { > - /* Common Registers */ > - init_proc_book3s_common(env); > - register_book3s_207_dbg_sprs(env); > - > - /* Common TCG PMU */ > - init_tcg_pmu_power8(env); > - > - /* POWER8 Specific Registers */ > - register_book3s_ids_sprs(env); > - register_amr_sprs(env); > - register_iamr_sprs(env); > - register_book3s_purr_sprs(env); > - register_power5p_common_sprs(env); > - register_power5p_lpar_sprs(env); > - register_power5p_ear_sprs(env); > - register_power5p_tb_sprs(env); > - register_power6_common_sprs(env); > + register_power9_common_sprs(env); > register_HEIR64_spr(env); > - register_power6_dbg_sprs(env); > - register_power8_tce_address_control_sprs(env); > - register_power8_ids_sprs(env); > - register_power8_ebb_sprs(env); > - register_power8_fscr_sprs(env); > - register_power8_pmu_sup_sprs(env); > - register_power8_pmu_user_sprs(env); > - register_power8_tm_sprs(env); > - register_power8_pspb_sprs(env); > - register_power8_dpdes_sprs(env); > - register_vtb_sprs(env); > - register_power8_ic_sprs(env); > - register_power9_book4_sprs(env); > - register_power8_rpr_sprs(env); > - register_power9_mmu_sprs(env); > + > register_power10_hash_sprs(env); > register_power10_dexcr_sprs(env); > register_power10_pmu_sup_sprs(env); >
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 6d82f24c87..636e12ba7a 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6307,7 +6307,7 @@ static struct ppc_radix_page_info POWER9_radix_page_info = { }; #endif /* CONFIG_USER_ONLY */ -static void init_proc_POWER9(CPUPPCState *env) +static inline void register_power9_common_sprs(CPUPPCState *env) { /* Common Registers */ init_proc_book3s_common(env); @@ -6326,7 +6326,6 @@ static void init_proc_POWER9(CPUPPCState *env) register_power5p_ear_sprs(env); register_power5p_tb_sprs(env); register_power6_common_sprs(env); - register_HEIR32_spr(env); register_power6_dbg_sprs(env); register_power8_tce_address_control_sprs(env); register_power8_ids_sprs(env); @@ -6342,6 +6341,12 @@ static void init_proc_POWER9(CPUPPCState *env) register_power9_book4_sprs(env); register_power8_rpr_sprs(env); register_power9_mmu_sprs(env); +} + +static void init_proc_POWER9(CPUPPCState *env) +{ + register_power9_common_sprs(env); + register_HEIR32_spr(env); /* POWER9 Specific registers */ spr_register_kvm(env, SPR_TIDR, "TIDR", NULL, NULL, @@ -6499,39 +6504,9 @@ static struct ppc_radix_page_info POWER10_radix_page_info = { static void init_proc_POWER10(CPUPPCState *env) { - /* Common Registers */ - init_proc_book3s_common(env); - register_book3s_207_dbg_sprs(env); - - /* Common TCG PMU */ - init_tcg_pmu_power8(env); - - /* POWER8 Specific Registers */ - register_book3s_ids_sprs(env); - register_amr_sprs(env); - register_iamr_sprs(env); - register_book3s_purr_sprs(env); - register_power5p_common_sprs(env); - register_power5p_lpar_sprs(env); - register_power5p_ear_sprs(env); - register_power5p_tb_sprs(env); - register_power6_common_sprs(env); + register_power9_common_sprs(env); register_HEIR64_spr(env); - register_power6_dbg_sprs(env); - register_power8_tce_address_control_sprs(env); - register_power8_ids_sprs(env); - register_power8_ebb_sprs(env); - register_power8_fscr_sprs(env); - register_power8_pmu_sup_sprs(env); - register_power8_pmu_user_sprs(env); - register_power8_tm_sprs(env); - register_power8_pspb_sprs(env); - register_power8_dpdes_sprs(env); - register_vtb_sprs(env); - register_power8_ic_sprs(env); - register_power9_book4_sprs(env); - register_power8_rpr_sprs(env); - register_power9_mmu_sprs(env); + register_power10_hash_sprs(env); register_power10_dexcr_sprs(env); register_power10_pmu_sup_sprs(env);
Historically, the registration of sprs have been inherited alongwith every new Power arch support being added leading to a lot of code duplication. It's time to do necessary cleanups now to avoid further duplication with newer arch support being added. Signed-off-by: Harsh Prateek Bora <harshb@linux.ibm.com> --- target/ppc/cpu_init.c | 43 +++++++++---------------------------------- 1 file changed, 9 insertions(+), 34 deletions(-)