Message ID | 20240528083855.1912757-4-gaosong@loongson.cn (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add extioi virt extension support | expand |
On 2024/5/28 下午4:38, Song Gao wrote: > This patch adds a new board attribute 'v-eiointc'. > A value of true enables the virt extended I/O interrupt controller. > VMs working in kvm mode have 'v-eiointc' enabled by default. > > Signed-off-by: Song Gao <gaosong@loongson.cn> > --- > include/hw/loongarch/virt.h | 1 + > target/loongarch/cpu.h | 1 + > hw/loongarch/virt.c | 88 +++++++++++++++++++++++++++++++++++-- > 3 files changed, 87 insertions(+), 3 deletions(-) > > diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h > index 2c4f5cf9c8..8fdfacf268 100644 > --- a/include/hw/loongarch/virt.h > +++ b/include/hw/loongarch/virt.h > @@ -50,6 +50,7 @@ struct LoongArchVirtMachineState { > Notifier machine_done; > Notifier powerdown_notifier; > OnOffAuto acpi; > + OnOffAuto veiointc; > char *oem_id; > char *oem_table_id; > DeviceState *acpi_ged; > diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h > index 41b8e6d96d..6c41fafb70 100644 > --- a/target/loongarch/cpu.h > +++ b/target/loongarch/cpu.h > @@ -36,6 +36,7 @@ > #define CPUNAME_REG 0x20 > #define MISC_FUNC_REG 0x420 > #define IOCSRM_EXTIOI_EN 48 > +#define IOCSRM_EXTIOI_INT_ENCODE 49 > > #define IOCSR_MEM_SIZE 0x428 > > diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c > index a70eeda2fd..b33b1ad9d3 100644 > --- a/hw/loongarch/virt.c > +++ b/hw/loongarch/virt.c > @@ -11,6 +11,7 @@ > #include "hw/boards.h" > #include "hw/char/serial.h" > #include "sysemu/kvm.h" > +#include "sysemu/tcg.h" > #include "sysemu/sysemu.h" > #include "sysemu/qtest.h" > #include "sysemu/runstate.h" > @@ -47,6 +48,31 @@ > #include "hw/block/flash.h" > #include "qemu/error-report.h" > > +static bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms) > +{ > + if (lvms->veiointc == ON_OFF_AUTO_OFF) { > + return false; > + } > + return true; > +} > + > +static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); > + OnOffAuto veiointc = lvms->veiointc; > + > + visit_type_OnOffAuto(v, name, &veiointc, errp); > +} > + > +static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); > + > + visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); > +} > + > static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, > const char *name, > const char *alias_prop_name) > @@ -789,9 +815,16 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) > /* Create EXTIOI device */ > extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); > qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus); > + if (virt_is_veiointc_enabled(lvms)) { > + qdev_prop_set_bit(extioi, "has-virtualization-extension", true); > + } > sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); > memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, > - sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); > + sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); > + if (virt_is_veiointc_enabled(lvms)) { > + memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, > + sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); > + } > > /* > * connect ext irq to the cpu irq > @@ -898,11 +931,37 @@ static void virt_firmware_init(LoongArchVirtMachineState *lvms) > } > } > > - > static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, > uint64_t val, unsigned size, > MemTxAttrs attrs) > { > + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); > + uint64_t features; > + > + switch (addr) { > + case MISC_FUNC_REG: > + if (!virt_is_veiointc_enabled(lvms)) { > + return MEMTX_OK; > + } > + > + features = address_space_ldl(&lvms->as_iocsr, > + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, > + attrs, NULL); > + if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { > + features |= BIT(EXTIOI_ENABLE); > + } > + if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { > + features |= BIT(EXTIOI_ENABLE_INT_ENCODE); > + } > + > + address_space_stl(&lvms->as_iocsr, > + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, > + features, attrs, NULL); > + break; > + default: > + g_assert_not_reached(); > + } > + > return MEMTX_OK; > } > > @@ -910,7 +969,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, > uint64_t *data, > unsigned size, MemTxAttrs attrs) > { > + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); > uint64_t ret = 0; > + int features; > > switch (addr) { > case VERSION_REG: > @@ -929,7 +990,20 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, > ret = 0x303030354133ULL; /* "3A5000" */ > break; > case MISC_FUNC_REG: > - ret = BIT_ULL(IOCSRM_EXTIOI_EN); > + if (!virt_is_veiointc_enabled(lvms)) { > + ret |= BIT_ULL(IOCSRM_EXTIOI_EN); > + break; > + } > + > + features = address_space_ldl(&lvms->as_iocsr, > + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, > + attrs, NULL); > + if (features & BIT(EXTIOI_ENABLE)) { > + ret |= BIT_ULL(IOCSRM_EXTIOI_EN); > + } > + if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { > + ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); > + } > break; > default: > g_assert_not_reached(); > @@ -1151,6 +1225,9 @@ static void virt_initfn(Object *obj) > { > LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); > > + if (tcg_enabled()) { > + lvms->veiointc = ON_OFF_AUTO_OFF; > + } > lvms->acpi = ON_OFF_AUTO_AUTO; > lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); > lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); > @@ -1336,6 +1413,11 @@ static void virt_class_init(ObjectClass *oc, void *data) > NULL, NULL); > object_class_property_set_description(oc, "acpi", > "Enable ACPI"); > + object_class_property_add(oc, "v-eiointc", "OnOffAuto", > + virt_get_veiointc, virt_set_veiointc, > + NULL, NULL); > + object_class_property_set_description(oc, "v-eiointc", > + "Enable Virt Extend I/O Interrupt Controller."); > machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); > #ifdef CONFIG_TPM > machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS); > Reviewed-by: Bibo Mao <maobibo@loongson.cn>
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index 2c4f5cf9c8..8fdfacf268 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -50,6 +50,7 @@ struct LoongArchVirtMachineState { Notifier machine_done; Notifier powerdown_notifier; OnOffAuto acpi; + OnOffAuto veiointc; char *oem_id; char *oem_table_id; DeviceState *acpi_ged; diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 41b8e6d96d..6c41fafb70 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -36,6 +36,7 @@ #define CPUNAME_REG 0x20 #define MISC_FUNC_REG 0x420 #define IOCSRM_EXTIOI_EN 48 +#define IOCSRM_EXTIOI_INT_ENCODE 49 #define IOCSR_MEM_SIZE 0x428 diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index a70eeda2fd..b33b1ad9d3 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -11,6 +11,7 @@ #include "hw/boards.h" #include "hw/char/serial.h" #include "sysemu/kvm.h" +#include "sysemu/tcg.h" #include "sysemu/sysemu.h" #include "sysemu/qtest.h" #include "sysemu/runstate.h" @@ -47,6 +48,31 @@ #include "hw/block/flash.h" #include "qemu/error-report.h" +static bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms) +{ + if (lvms->veiointc == ON_OFF_AUTO_OFF) { + return false; + } + return true; +} + +static void virt_get_veiointc(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); + OnOffAuto veiointc = lvms->veiointc; + + visit_type_OnOffAuto(v, name, &veiointc, errp); +} + +static void virt_set_veiointc(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); + + visit_type_OnOffAuto(v, name, &lvms->veiointc, errp); +} + static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms, const char *name, const char *alias_prop_name) @@ -789,9 +815,16 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms) /* Create EXTIOI device */ extioi = qdev_new(TYPE_LOONGARCH_EXTIOI); qdev_prop_set_uint32(extioi, "num-cpu", ms->smp.cpus); + if (virt_is_veiointc_enabled(lvms)) { + qdev_prop_set_bit(extioi, "has-virtualization-extension", true); + } sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal); memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE, - sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); + sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0)); + if (virt_is_veiointc_enabled(lvms)) { + memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE, + sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1)); + } /* * connect ext irq to the cpu irq @@ -898,11 +931,37 @@ static void virt_firmware_init(LoongArchVirtMachineState *lvms) } } - static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr, uint64_t val, unsigned size, MemTxAttrs attrs) { + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); + uint64_t features; + + switch (addr) { + case MISC_FUNC_REG: + if (!virt_is_veiointc_enabled(lvms)) { + return MEMTX_OK; + } + + features = address_space_ldl(&lvms->as_iocsr, + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, + attrs, NULL); + if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) { + features |= BIT(EXTIOI_ENABLE); + } + if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) { + features |= BIT(EXTIOI_ENABLE_INT_ENCODE); + } + + address_space_stl(&lvms->as_iocsr, + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, + features, attrs, NULL); + break; + default: + g_assert_not_reached(); + } + return MEMTX_OK; } @@ -910,7 +969,9 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, uint64_t *data, unsigned size, MemTxAttrs attrs) { + LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque); uint64_t ret = 0; + int features; switch (addr) { case VERSION_REG: @@ -929,7 +990,20 @@ static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr, ret = 0x303030354133ULL; /* "3A5000" */ break; case MISC_FUNC_REG: - ret = BIT_ULL(IOCSRM_EXTIOI_EN); + if (!virt_is_veiointc_enabled(lvms)) { + ret |= BIT_ULL(IOCSRM_EXTIOI_EN); + break; + } + + features = address_space_ldl(&lvms->as_iocsr, + EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG, + attrs, NULL); + if (features & BIT(EXTIOI_ENABLE)) { + ret |= BIT_ULL(IOCSRM_EXTIOI_EN); + } + if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) { + ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE); + } break; default: g_assert_not_reached(); @@ -1151,6 +1225,9 @@ static void virt_initfn(Object *obj) { LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj); + if (tcg_enabled()) { + lvms->veiointc = ON_OFF_AUTO_OFF; + } lvms->acpi = ON_OFF_AUTO_AUTO; lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6); lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8); @@ -1336,6 +1413,11 @@ static void virt_class_init(ObjectClass *oc, void *data) NULL, NULL); object_class_property_set_description(oc, "acpi", "Enable ACPI"); + object_class_property_add(oc, "v-eiointc", "OnOffAuto", + virt_get_veiointc, virt_set_veiointc, + NULL, NULL); + object_class_property_set_description(oc, "v-eiointc", + "Enable Virt Extend I/O Interrupt Controller."); machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE); #ifdef CONFIG_TPM machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
This patch adds a new board attribute 'v-eiointc'. A value of true enables the virt extended I/O interrupt controller. VMs working in kvm mode have 'v-eiointc' enabled by default. Signed-off-by: Song Gao <gaosong@loongson.cn> --- include/hw/loongarch/virt.h | 1 + target/loongarch/cpu.h | 1 + hw/loongarch/virt.c | 88 +++++++++++++++++++++++++++++++++++-- 3 files changed, 87 insertions(+), 3 deletions(-)