| Message ID | 20240622094402.244604-2-ines.varhol@telecom-paris.fr (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Check clock connection between STM32L4x5 RCC and peripherals | expand |
On 11:43 Sat 22 Jun , Inès Varhol wrote: > This commit creates a clock in STM32L4x5 SYSCFG and wires it up to the > corresponding clock from STM32L4x5 RCC. > > Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> > --- > include/hw/misc/stm32l4x5_syscfg.h | 1 + > hw/arm/stm32l4x5_soc.c | 2 ++ > hw/misc/stm32l4x5_syscfg.c | 19 +++++++++++++++++-- > 3 files changed, 20 insertions(+), 2 deletions(-) > > diff --git a/include/hw/misc/stm32l4x5_syscfg.h b/include/hw/misc/stm32l4x5_syscfg.h > index 23bb564150..c450df2b9e 100644 > --- a/include/hw/misc/stm32l4x5_syscfg.h > +++ b/include/hw/misc/stm32l4x5_syscfg.h > @@ -48,6 +48,7 @@ struct Stm32l4x5SyscfgState { > uint32_t swpr2; > > qemu_irq gpio_out[GPIO_NUM_PINS]; > + Clock *clk; > }; > > #endif > diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c > index 38f7a2d5d9..fb2afa6cfe 100644 > --- a/hw/arm/stm32l4x5_soc.c > +++ b/hw/arm/stm32l4x5_soc.c > @@ -236,6 +236,8 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) > > /* System configuration controller */ > busdev = SYS_BUS_DEVICE(&s->syscfg); > + qdev_connect_clock_in(DEVICE(&s->syscfg), "clk", > + qdev_get_clock_out(DEVICE(&(s->rcc)), "syscfg-out")); > if (!sysbus_realize(busdev, errp)) { > return; > } > diff --git a/hw/misc/stm32l4x5_syscfg.c b/hw/misc/stm32l4x5_syscfg.c > index a5a1ce2680..a947a9e036 100644 > --- a/hw/misc/stm32l4x5_syscfg.c > +++ b/hw/misc/stm32l4x5_syscfg.c > @@ -26,6 +26,9 @@ > #include "trace.h" > #include "hw/irq.h" > #include "migration/vmstate.h" > +#include "hw/clock.h" > +#include "hw/qdev-clock.h" > +#include "qapi/error.h" > #include "hw/misc/stm32l4x5_syscfg.h" > #include "hw/gpio/stm32l4x5_gpio.h" > > @@ -225,12 +228,22 @@ static void stm32l4x5_syscfg_init(Object *obj) > qdev_init_gpio_in(DEVICE(obj), stm32l4x5_syscfg_set_irq, > GPIO_NUM_PINS * NUM_GPIOS); > qdev_init_gpio_out(DEVICE(obj), s->gpio_out, GPIO_NUM_PINS); > + s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0); > +} > + > +static void stm32l4x5_syscfg_realize(DeviceState *dev, Error **errp) > +{ > + Stm32l4x5SyscfgState *s = STM32L4X5_SYSCFG(dev); > + if (!clock_has_source(s->clk)) { > + error_setg(errp, "SYSCFG: clk input must be connected"); > + return; > + } > } > > static const VMStateDescription vmstate_stm32l4x5_syscfg = { > .name = TYPE_STM32L4X5_SYSCFG, > - .version_id = 1, > - .minimum_version_id = 1, > + .version_id = 2, > + .minimum_version_id = 2, > .fields = (VMStateField[]) { > VMSTATE_UINT32(memrmp, Stm32l4x5SyscfgState), > VMSTATE_UINT32(cfgr1, Stm32l4x5SyscfgState), > @@ -241,6 +254,7 @@ static const VMStateDescription vmstate_stm32l4x5_syscfg = { > VMSTATE_UINT32(swpr, Stm32l4x5SyscfgState), > VMSTATE_UINT32(skr, Stm32l4x5SyscfgState), > VMSTATE_UINT32(swpr2, Stm32l4x5SyscfgState), > + VMSTATE_CLOCK(clk, Stm32l4x5SyscfgState), > VMSTATE_END_OF_LIST() > } > }; > @@ -251,6 +265,7 @@ static void stm32l4x5_syscfg_class_init(ObjectClass *klass, void *data) > ResettableClass *rc = RESETTABLE_CLASS(klass); > > dc->vmsd = &vmstate_stm32l4x5_syscfg; > + dc->realize = stm32l4x5_syscfg_realize; > rc->phases.hold = stm32l4x5_syscfg_hold_reset; > } > > -- > 2.43.2 > --
diff --git a/include/hw/misc/stm32l4x5_syscfg.h b/include/hw/misc/stm32l4x5_syscfg.h index 23bb564150..c450df2b9e 100644 --- a/include/hw/misc/stm32l4x5_syscfg.h +++ b/include/hw/misc/stm32l4x5_syscfg.h @@ -48,6 +48,7 @@ struct Stm32l4x5SyscfgState { uint32_t swpr2; qemu_irq gpio_out[GPIO_NUM_PINS]; + Clock *clk; }; #endif diff --git a/hw/arm/stm32l4x5_soc.c b/hw/arm/stm32l4x5_soc.c index 38f7a2d5d9..fb2afa6cfe 100644 --- a/hw/arm/stm32l4x5_soc.c +++ b/hw/arm/stm32l4x5_soc.c @@ -236,6 +236,8 @@ static void stm32l4x5_soc_realize(DeviceState *dev_soc, Error **errp) /* System configuration controller */ busdev = SYS_BUS_DEVICE(&s->syscfg); + qdev_connect_clock_in(DEVICE(&s->syscfg), "clk", + qdev_get_clock_out(DEVICE(&(s->rcc)), "syscfg-out")); if (!sysbus_realize(busdev, errp)) { return; } diff --git a/hw/misc/stm32l4x5_syscfg.c b/hw/misc/stm32l4x5_syscfg.c index a5a1ce2680..a947a9e036 100644 --- a/hw/misc/stm32l4x5_syscfg.c +++ b/hw/misc/stm32l4x5_syscfg.c @@ -26,6 +26,9 @@ #include "trace.h" #include "hw/irq.h" #include "migration/vmstate.h" +#include "hw/clock.h" +#include "hw/qdev-clock.h" +#include "qapi/error.h" #include "hw/misc/stm32l4x5_syscfg.h" #include "hw/gpio/stm32l4x5_gpio.h" @@ -225,12 +228,22 @@ static void stm32l4x5_syscfg_init(Object *obj) qdev_init_gpio_in(DEVICE(obj), stm32l4x5_syscfg_set_irq, GPIO_NUM_PINS * NUM_GPIOS); qdev_init_gpio_out(DEVICE(obj), s->gpio_out, GPIO_NUM_PINS); + s->clk = qdev_init_clock_in(DEVICE(s), "clk", NULL, s, 0); +} + +static void stm32l4x5_syscfg_realize(DeviceState *dev, Error **errp) +{ + Stm32l4x5SyscfgState *s = STM32L4X5_SYSCFG(dev); + if (!clock_has_source(s->clk)) { + error_setg(errp, "SYSCFG: clk input must be connected"); + return; + } } static const VMStateDescription vmstate_stm32l4x5_syscfg = { .name = TYPE_STM32L4X5_SYSCFG, - .version_id = 1, - .minimum_version_id = 1, + .version_id = 2, + .minimum_version_id = 2, .fields = (VMStateField[]) { VMSTATE_UINT32(memrmp, Stm32l4x5SyscfgState), VMSTATE_UINT32(cfgr1, Stm32l4x5SyscfgState), @@ -241,6 +254,7 @@ static const VMStateDescription vmstate_stm32l4x5_syscfg = { VMSTATE_UINT32(swpr, Stm32l4x5SyscfgState), VMSTATE_UINT32(skr, Stm32l4x5SyscfgState), VMSTATE_UINT32(swpr2, Stm32l4x5SyscfgState), + VMSTATE_CLOCK(clk, Stm32l4x5SyscfgState), VMSTATE_END_OF_LIST() } }; @@ -251,6 +265,7 @@ static void stm32l4x5_syscfg_class_init(ObjectClass *klass, void *data) ResettableClass *rc = RESETTABLE_CLASS(klass); dc->vmsd = &vmstate_stm32l4x5_syscfg; + dc->realize = stm32l4x5_syscfg_realize; rc->phases.hold = stm32l4x5_syscfg_hold_reset; }