@@ -46,8 +46,7 @@ DEF_HELPER_FLAGS_3(stmw, TCG_CALL_NO_WG, void, env, tl, i32)
DEF_HELPER_4(lsw, void, env, tl, i32, i32)
DEF_HELPER_5(lswx, void, env, tl, i32, i32, i32)
DEF_HELPER_FLAGS_4(stsw, TCG_CALL_NO_WG, void, env, tl, i32, i32)
-DEF_HELPER_FLAGS_3(dcbz, TCG_CALL_NO_WG, void, env, tl, i32)
-DEF_HELPER_FLAGS_3(dcbzep, TCG_CALL_NO_WG, void, env, tl, i32)
+DEF_HELPER_FLAGS_4(dcbz, TCG_CALL_NO_WG, void, env, tl, i32, i32)
DEF_HELPER_FLAGS_2(icbi, TCG_CALL_NO_WG, void, env, tl)
DEF_HELPER_FLAGS_2(icbiep, TCG_CALL_NO_WG, void, env, tl)
DEF_HELPER_5(lscbx, tl, env, tl, i32, i32, i32)
@@ -270,13 +270,13 @@ void helper_stsw(CPUPPCState *env, target_ulong addr, uint32_t nb,
}
}
-static void dcbz_common(CPUPPCState *env, target_ulong addr,
- uint32_t opcode, bool epid, uintptr_t retaddr)
+void helper_dcbz(CPUPPCState *env, target_ulong addr, uint32_t opcode,
+ uint32_t mmu_idx)
{
target_ulong mask, dcbz_size = env->dcache_line_size;
uint32_t i;
void *haddr;
- int mmu_idx = epid ? PPC_TLB_EPID_STORE : ppc_env_mmu_index(env, false);
+ uintptr_t retaddr = GETPC();
#if defined(TARGET_PPC64)
/* Check for dcbz vs dcbzl on 970 */
@@ -307,16 +307,6 @@ static void dcbz_common(CPUPPCState *env, target_ulong addr,
}
}
-void helper_dcbz(CPUPPCState *env, target_ulong addr, uint32_t opcode)
-{
- dcbz_common(env, addr, opcode, false, GETPC());
-}
-
-void helper_dcbzep(CPUPPCState *env, target_ulong addr, uint32_t opcode)
-{
- dcbz_common(env, addr, opcode, true, GETPC());
-}
-
void helper_icbi(CPUPPCState *env, target_ulong addr)
{
addr &= ~(env->dcache_line_size - 1);
@@ -4445,27 +4445,25 @@ static void gen_dcblc(DisasContext *ctx)
/* dcbz */
static void gen_dcbz(DisasContext *ctx)
{
- TCGv tcgv_addr;
- TCGv_i32 tcgv_op;
+ TCGv tcgv_addr = tcg_temp_new();
gen_set_access_type(ctx, ACCESS_CACHE);
- tcgv_addr = tcg_temp_new();
- tcgv_op = tcg_constant_i32(ctx->opcode & 0x03FF000);
gen_addr_reg_index(ctx, tcgv_addr);
- gen_helper_dcbz(tcg_env, tcgv_addr, tcgv_op);
+ gen_helper_dcbz(tcg_env, tcgv_addr,
+ tcg_constant_i32(ctx->opcode & 0x03FF000),
+ tcg_constant_i32(ctx->mem_idx));
}
/* dcbzep */
static void gen_dcbzep(DisasContext *ctx)
{
- TCGv tcgv_addr;
- TCGv_i32 tcgv_op;
+ TCGv tcgv_addr = tcg_temp_new();
gen_set_access_type(ctx, ACCESS_CACHE);
- tcgv_addr = tcg_temp_new();
- tcgv_op = tcg_constant_i32(ctx->opcode & 0x03FF000);
gen_addr_reg_index(ctx, tcgv_addr);
- gen_helper_dcbzep(tcg_env, tcgv_addr, tcgv_op);
+ gen_helper_dcbz(tcg_env, tcgv_addr,
+ tcg_constant_i32(ctx->opcode & 0x03FF000),
+ tcg_constant_i32(PPC_TLB_EPID_STORE));
}
/* dst / dstt */
This is an updated version of this patch as suggested by Richard but it runs slower and only gets 5.9 seconds instead of 5.83-5.81 with v1 so this is not for merge, only for reference in case it can be useful for further optimisation or can be fixed in some way. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- target/ppc/helper.h | 3 +-- target/ppc/mem_helper.c | 16 +++------------- target/ppc/translate.c | 18 ++++++++---------- 3 files changed, 12 insertions(+), 25 deletions(-)