| Message ID | 20240624201825.1054980-7-dbarboza@ventanamicro.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: QEMU RISC-V IOMMU Support | expand |
On Tue, Jun 25, 2024 at 6:21 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > From: Tomasz Jeznach <tjeznach@rivosinc.com> > > Generate device tree entry for riscv-iommu PCI device, along with > mapping all PCI device identifiers to the single IOMMU device instance. > > Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com> > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > Reviewed-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/riscv/virt.c | 33 ++++++++++++++++++++++++++++++++- > 1 file changed, 32 insertions(+), 1 deletion(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 5676d66d12..72ab563007 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -32,6 +32,7 @@ > #include "hw/core/sysbus-fdt.h" > #include "target/riscv/pmu.h" > #include "hw/riscv/riscv_hart.h" > +#include "hw/riscv/iommu.h" > #include "hw/riscv/virt.h" > #include "hw/riscv/boot.h" > #include "hw/riscv/numa.h" > @@ -1006,6 +1007,30 @@ static void create_fdt_virtio_iommu(RISCVVirtState *s, uint16_t bdf) > bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); > } > > +static void create_fdt_iommu(RISCVVirtState *s, uint16_t bdf) > +{ > + const char comp[] = "riscv,pci-iommu"; > + void *fdt = MACHINE(s)->fdt; > + uint32_t iommu_phandle; > + g_autofree char *iommu_node = NULL; > + g_autofree char *pci_node = NULL; > + > + pci_node = g_strdup_printf("/soc/pci@%lx", > + (long) virt_memmap[VIRT_PCIE_ECAM].base); > + iommu_node = g_strdup_printf("%s/iommu@%x", pci_node, bdf); > + iommu_phandle = qemu_fdt_alloc_phandle(fdt); > + qemu_fdt_add_subnode(fdt, iommu_node); > + > + qemu_fdt_setprop(fdt, iommu_node, "compatible", comp, sizeof(comp)); > + qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); > + qemu_fdt_setprop_cell(fdt, iommu_node, "phandle", iommu_phandle); > + qemu_fdt_setprop_cells(fdt, iommu_node, "reg", > + bdf << 8, 0, 0, 0, 0); > + qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", > + 0, iommu_phandle, 0, bdf, > + bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); > +} > + > static void finalize_fdt(RISCVVirtState *s) > { > uint32_t phandle = 1, irq_mmio_phandle = 1, msi_pcie_phandle = 1; > @@ -1712,9 +1737,11 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine, > MachineClass *mc = MACHINE_GET_CLASS(machine); > > if (device_is_dynamic_sysbus(mc, dev) || > - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { > + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || > + object_dynamic_cast(OBJECT(dev), TYPE_RISCV_IOMMU_PCI)) { > return HOTPLUG_HANDLER(machine); > } > + > return NULL; > } > > @@ -1735,6 +1762,10 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev, > if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { > create_fdt_virtio_iommu(s, pci_get_bdf(PCI_DEVICE(dev))); > } > + > + if (object_dynamic_cast(OBJECT(dev), TYPE_RISCV_IOMMU_PCI)) { > + create_fdt_iommu(s, pci_get_bdf(PCI_DEVICE(dev))); > + } > } > > static void virt_machine_class_init(ObjectClass *oc, void *data) > -- > 2.45.2 > >
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 5676d66d12..72ab563007 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -32,6 +32,7 @@ #include "hw/core/sysbus-fdt.h" #include "target/riscv/pmu.h" #include "hw/riscv/riscv_hart.h" +#include "hw/riscv/iommu.h" #include "hw/riscv/virt.h" #include "hw/riscv/boot.h" #include "hw/riscv/numa.h" @@ -1006,6 +1007,30 @@ static void create_fdt_virtio_iommu(RISCVVirtState *s, uint16_t bdf) bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); } +static void create_fdt_iommu(RISCVVirtState *s, uint16_t bdf) +{ + const char comp[] = "riscv,pci-iommu"; + void *fdt = MACHINE(s)->fdt; + uint32_t iommu_phandle; + g_autofree char *iommu_node = NULL; + g_autofree char *pci_node = NULL; + + pci_node = g_strdup_printf("/soc/pci@%lx", + (long) virt_memmap[VIRT_PCIE_ECAM].base); + iommu_node = g_strdup_printf("%s/iommu@%x", pci_node, bdf); + iommu_phandle = qemu_fdt_alloc_phandle(fdt); + qemu_fdt_add_subnode(fdt, iommu_node); + + qemu_fdt_setprop(fdt, iommu_node, "compatible", comp, sizeof(comp)); + qemu_fdt_setprop_cell(fdt, iommu_node, "#iommu-cells", 1); + qemu_fdt_setprop_cell(fdt, iommu_node, "phandle", iommu_phandle); + qemu_fdt_setprop_cells(fdt, iommu_node, "reg", + bdf << 8, 0, 0, 0, 0); + qemu_fdt_setprop_cells(fdt, pci_node, "iommu-map", + 0, iommu_phandle, 0, bdf, + bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf); +} + static void finalize_fdt(RISCVVirtState *s) { uint32_t phandle = 1, irq_mmio_phandle = 1, msi_pcie_phandle = 1; @@ -1712,9 +1737,11 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine, MachineClass *mc = MACHINE_GET_CLASS(machine); if (device_is_dynamic_sysbus(mc, dev) || - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) || + object_dynamic_cast(OBJECT(dev), TYPE_RISCV_IOMMU_PCI)) { return HOTPLUG_HANDLER(machine); } + return NULL; } @@ -1735,6 +1762,10 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev, if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { create_fdt_virtio_iommu(s, pci_get_bdf(PCI_DEVICE(dev))); } + + if (object_dynamic_cast(OBJECT(dev), TYPE_RISCV_IOMMU_PCI)) { + create_fdt_iommu(s, pci_get_bdf(PCI_DEVICE(dev))); + } } static void virt_machine_class_init(ObjectClass *oc, void *data)