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Thu, 4 Jul 2024 14:48:00 +0000 From: CLEMENT MATHIEU--DRIF To: "qemu-devel@nongnu.org" CC: "jasowang@redhat.com" , "zhenzhong.duan@intel.com" , "kevin.tian@intel.com" , "yi.l.liu@intel.com" , "joao.m.martins@oracle.com" , "peterx@redhat.com" , "mst@redhat.com" , Clement Mathieu--Drif , CLEMENT MATHIEU--DRIF Subject: [PATCH v1 3/3] intel_iommu: Bypass barrier wait descriptor Thread-Topic: [PATCH v1 3/3] intel_iommu: Bypass barrier wait descriptor Thread-Index: AQHaziEqYSd3fPOVYk+uet6FPduJ+A== Date: Thu, 4 Jul 2024 14:48:00 +0000 Message-ID: <20240704144737.996889-4-clement.mathieu--drif@eviden.com> References: <20240704144737.996889-1-clement.mathieu--drif@eviden.com> In-Reply-To: <20240704144737.996889-1-clement.mathieu--drif@eviden.com> Accept-Language: en-GB, fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=eviden.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: AM8PR07MB7602:EE_|VI1PR07MB9499:EE_ x-ms-office365-filtering-correlation-id: f34f8d91-3a57-4517-6f3e-08dc9c384d40 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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envelope-from=clement.mathieu--drif@eviden.com; helo=smarthost1.eviden.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Clement Mathieu--Drif wait_desc with SW=0,IF=0,FN=1 must not be considered as an invalid descriptor as it is used to implement section 7.10 of the VT-d spec Signed-off-by: Clément Mathieu--Drif --- hw/i386/intel_iommu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index be0cb39b5c..12ea3a9aa0 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2561,6 +2561,12 @@ static bool vtd_process_wait_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc) } else if (inv_desc->lo & VTD_INV_DESC_WAIT_IF) { /* Interrupt flag */ vtd_generate_completion_event(s); + } else if (inv_desc->lo & VTD_INV_DESC_WAIT_FN) { + /* + * SW = 0, IF = 0, FN = 1 + * This kind of descriptor is defined in section 7.10 of VT-d + * Nothing to do as we process the events sequentially + */ } else { error_report_once("%s: invalid wait desc: hi=%"PRIx64", lo=%"PRIx64 " (unknown type)", __func__, inv_desc->hi,