| Message ID | 20240718064925.1846074-3-jamin_lin@aspeedtech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | support ADC and I2C for AST2700 | expand |
On 7/18/24 08:49, Jamin Lin wrote: > Add ADC model for AST2700 ADC support. > The ADC controller registers base address is start at > 0x14C0_0000 and its address space is 0x1000. > The ADC controller interrupt is connected to > GICINT130_INTC group at bit 16. The GIC IRQ is 130. > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Thanks, C. > --- > hw/arm/aspeed_ast27x0.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c > index a9fb0d4b88..4257b5e8af 100644 > --- a/hw/arm/aspeed_ast27x0.c > +++ b/hw/arm/aspeed_ast27x0.c > @@ -60,6 +60,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = { > [ASPEED_DEV_SLIIO] = 0x14C1E000, > [ASPEED_GIC_DIST] = 0x12200000, > [ASPEED_GIC_REDIST] = 0x12280000, > + [ASPEED_DEV_ADC] = 0x14C00000, > }; > > #define AST2700_MAX_IRQ 288 > @@ -344,6 +345,9 @@ static void aspeed_soc_ast2700_init(Object *obj) > object_initialize_child(obj, "sli", &s->sli, TYPE_ASPEED_2700_SLI); > object_initialize_child(obj, "sliio", &s->sliio, TYPE_ASPEED_2700_SLIIO); > object_initialize_child(obj, "intc", &a->intc, TYPE_ASPEED_2700_INTC); > + > + snprintf(typename, sizeof(typename), "aspeed.adc-%s", socname); > + object_initialize_child(obj, "adc", &s->adc, typename); > } > > /* > @@ -601,6 +605,14 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) > aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sliio), 0, > sc->memmap[ASPEED_DEV_SLIIO]); > > + /* ADC */ > + if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) { > + return; > + } > + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, > + aspeed_soc_get_irq(s, ASPEED_DEV_ADC)); > + > create_unimplemented_device("ast2700.dpmcu", 0x11000000, 0x40000); > create_unimplemented_device("ast2700.iomem0", 0x12000000, 0x01000000); > create_unimplemented_device("ast2700.iomem1", 0x14000000, 0x01000000);
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index a9fb0d4b88..4257b5e8af 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -60,6 +60,7 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = { [ASPEED_DEV_SLIIO] = 0x14C1E000, [ASPEED_GIC_DIST] = 0x12200000, [ASPEED_GIC_REDIST] = 0x12280000, + [ASPEED_DEV_ADC] = 0x14C00000, }; #define AST2700_MAX_IRQ 288 @@ -344,6 +345,9 @@ static void aspeed_soc_ast2700_init(Object *obj) object_initialize_child(obj, "sli", &s->sli, TYPE_ASPEED_2700_SLI); object_initialize_child(obj, "sliio", &s->sliio, TYPE_ASPEED_2700_SLIIO); object_initialize_child(obj, "intc", &a->intc, TYPE_ASPEED_2700_INTC); + + snprintf(typename, sizeof(typename), "aspeed.adc-%s", socname); + object_initialize_child(obj, "adc", &s->adc, typename); } /* @@ -601,6 +605,14 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->sliio), 0, sc->memmap[ASPEED_DEV_SLIIO]); + /* ADC */ + if (!sysbus_realize(SYS_BUS_DEVICE(&s->adc), errp)) { + return; + } + aspeed_mmio_map(s, SYS_BUS_DEVICE(&s->adc), 0, sc->memmap[ASPEED_DEV_ADC]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->adc), 0, + aspeed_soc_get_irq(s, ASPEED_DEV_ADC)); + create_unimplemented_device("ast2700.dpmcu", 0x11000000, 0x40000); create_unimplemented_device("ast2700.iomem0", 0x12000000, 0x01000000); create_unimplemented_device("ast2700.iomem1", 0x14000000, 0x01000000);
Add ADC model for AST2700 ADC support. The ADC controller registers base address is start at 0x14C0_0000 and its address space is 0x1000. The ADC controller interrupt is connected to GICINT130_INTC group at bit 16. The GIC IRQ is 130. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> --- hw/arm/aspeed_ast27x0.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)