| Message ID | 20240802072417.659-3-zhiwei_liu@linux.alibaba.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: Remove redundant insn length check for zama16b | expand |
On 8/2/24 17:24, LIU Zhiwei wrote: > Zama16b loads and stores of no more than MXLEN bits defined in the F, D, and Q > extensions. > > Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> > --- > target/riscv/insn_trans/trans_rvd.c.inc | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/insn_trans/trans_rvd.c.inc b/target/riscv/insn_trans/trans_rvd.c.inc > index 0ac42c3223..49682292b8 100644 > --- a/target/riscv/insn_trans/trans_rvd.c.inc > +++ b/target/riscv/insn_trans/trans_rvd.c.inc > @@ -47,7 +47,11 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a) > REQUIRE_FPU; > REQUIRE_EXT(ctx, RVD); > > - if (ctx->cfg_ptr->ext_zama16b) { > + /* > + * Zama16b applies to loads and stores of no more than MXLEN bits defined > + * in the F, D, and Q extensions. > + */ > + if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) { > memop |= MO_ATOM_WITHIN16; > } > > @@ -67,7 +71,7 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a) > REQUIRE_FPU; > REQUIRE_EXT(ctx, RVD); > > - if (ctx->cfg_ptr->ext_zama16b) { > + if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) { > memop |= MO_ATOM_WITHIN16; > } > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On Fri, Aug 2, 2024 at 5:27 PM LIU Zhiwei <zhiwei_liu@linux.alibaba.com> wrote: > > Zama16b loads and stores of no more than MXLEN bits defined in the F, D, and Q > extensions. > > Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/insn_trans/trans_rvd.c.inc | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/insn_trans/trans_rvd.c.inc b/target/riscv/insn_trans/trans_rvd.c.inc > index 0ac42c3223..49682292b8 100644 > --- a/target/riscv/insn_trans/trans_rvd.c.inc > +++ b/target/riscv/insn_trans/trans_rvd.c.inc > @@ -47,7 +47,11 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a) > REQUIRE_FPU; > REQUIRE_EXT(ctx, RVD); > > - if (ctx->cfg_ptr->ext_zama16b) { > + /* > + * Zama16b applies to loads and stores of no more than MXLEN bits defined > + * in the F, D, and Q extensions. > + */ > + if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) { > memop |= MO_ATOM_WITHIN16; > } > > @@ -67,7 +71,7 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a) > REQUIRE_FPU; > REQUIRE_EXT(ctx, RVD); > > - if (ctx->cfg_ptr->ext_zama16b) { > + if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) { > memop |= MO_ATOM_WITHIN16; > } > > -- > 2.25.1 > >
diff --git a/target/riscv/insn_trans/trans_rvd.c.inc b/target/riscv/insn_trans/trans_rvd.c.inc index 0ac42c3223..49682292b8 100644 --- a/target/riscv/insn_trans/trans_rvd.c.inc +++ b/target/riscv/insn_trans/trans_rvd.c.inc @@ -47,7 +47,11 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a) REQUIRE_FPU; REQUIRE_EXT(ctx, RVD); - if (ctx->cfg_ptr->ext_zama16b) { + /* + * Zama16b applies to loads and stores of no more than MXLEN bits defined + * in the F, D, and Q extensions. + */ + if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) { memop |= MO_ATOM_WITHIN16; } @@ -67,7 +71,7 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a) REQUIRE_FPU; REQUIRE_EXT(ctx, RVD); - if (ctx->cfg_ptr->ext_zama16b) { + if ((get_xl_max(ctx) >= MXL_RV64) && ctx->cfg_ptr->ext_zama16b) { memop |= MO_ATOM_WITHIN16; }
Zama16b loads and stores of no more than MXLEN bits defined in the F, D, and Q extensions. Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> --- target/riscv/insn_trans/trans_rvd.c.inc | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)