diff mbox series

[v3,20/26] target/m68k: Move gen_addr_fault into gen_{load, store}_mode_fp

Message ID 20240909172823.649837-21-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/m68k: fpu improvements | expand

Commit Message

Richard Henderson Sept. 9, 2024, 5:28 p.m. UTC 
Move the exception to be raised into the helpers.
This in preparation for raising other exceptions,
and still wanting to return failure.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/m68k/translate.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Comments

Philippe Mathieu-Daudé Sept. 9, 2024, 10:14 p.m. UTC | #1 
On 9/9/24 19:28, Richard Henderson wrote:
> Move the exception to be raised into the helpers.
> This in preparation for raising other exceptions,
> and still wanting to return failure.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/m68k/translate.c | 10 ++++++----
>   1 file changed, 6 insertions(+), 4 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff mbox series

Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index c81d093c61..df886ed062 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -1023,6 +1023,7 @@  static bool gen_load_mode_fp(DisasContext *s, uint16_t insn, int opsize,
         return true;
 
     case 1: /* Address register direct.  */
+        gen_addr_fault(s);
         return false;
 
     case 7: /* Other */
@@ -1079,6 +1080,7 @@  static bool gen_load_mode_fp(DisasContext *s, uint16_t insn, int opsize,
     case 6: /* Indirect index + displacement.  */
         addr = gen_lea_mode(s, mode, reg0, opsize);
         if (IS_NULL_QREG(addr)) {
+            gen_addr_fault(s);
             return false;
         }
         gen_load_fp(s, opsize, addr, fp, index);
@@ -1112,6 +1114,7 @@  static bool gen_store_mode_fp(DisasContext *s, uint16_t insn, int opsize,
         return true;
 
     case 1: /* Address register direct.  */
+        gen_addr_fault(s);
         return false;
 
     case 2: /* Indirect register */
@@ -1122,6 +1125,7 @@  static bool gen_store_mode_fp(DisasContext *s, uint16_t insn, int opsize,
     case 7: /* Other */
         addr = gen_lea_mode(s, mode, reg0, opsize);
         if (IS_NULL_QREG(addr)) {
+            gen_addr_fault(s);
             return false;
         }
         gen_store_fp(s, opsize, addr, fp, index);
@@ -4887,10 +4891,9 @@  DISAS_INSN(fpu)
     case 3: /* fmove out */
         cpu_src = gen_fp_ptr(REG(ext, 7));
         opsize = ext_opsize(ext, 10);
-        if (!gen_store_mode_fp(s, insn, opsize, cpu_src, IS_USER(s))) {
-            gen_addr_fault(s);
+        if (gen_store_mode_fp(s, insn, opsize, cpu_src, IS_USER(s))) {
+            gen_helper_update_fpsr(tcg_env, cpu_src);
         }
-        gen_helper_update_fpsr(tcg_env, cpu_src);
         return;
     case 4: /* fmove to control register.  */
     case 5: /* fmove from control register.  */
@@ -4909,7 +4912,6 @@  DISAS_INSN(fpu)
         opsize = ext_opsize(ext, 10);
         cpu_src = gen_fp_result_ptr();
         if (!gen_load_mode_fp(s, insn, opsize, cpu_src, IS_USER(s))) {
-            gen_addr_fault(s);
             return;
         }
     } else {