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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20710e11e02sm36539875ad.14.2024.09.09.10.28.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Sep 2024 10:28:29 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, daniel@0x0f.com Subject: [PATCH v3 05/26] target/m68k: Update FPSR.EXC Date: Mon, 9 Sep 2024 10:28:02 -0700 Message-ID: <20240909172823.649837-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240909172823.649837-1-richard.henderson@linaro.org> References: <20240909172823.649837-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org So far we've only been updating the AEXC byte. Update the EXC byte as well. Signed-off-by: Richard Henderson --- target/m68k/fpu_helper.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 56694418f2..0c8c14966d 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -170,7 +170,7 @@ void HELPER(update_fpsr)(CPUM68KState *env, FPReg *pval) floatx80 val = pval->d; int soft; - fpsr &= ~FPSR_CC_MASK; + fpsr &= ~(FPSR_CC_MASK | FPSR_EXC_MASK); if (floatx80_is_neg(val)) { fpsr |= FPSR_CC_N; @@ -187,20 +187,22 @@ void HELPER(update_fpsr)(CPUM68KState *env, FPReg *pval) if (soft) { set_float_exception_flags(0, &env->fp_status); - if (soft & float_flag_invalid) { - fpsr |= FPSR_AEXP_IOP; + if (soft & float_flag_invalid_snan) { + fpsr |= FPSR_EXC_SNAN | FPSR_AEXP_IOP; + } else if (soft & float_flag_invalid) { + fpsr |= FPSR_EXC_OPERR | FPSR_AEXP_IOP; } if (soft & float_flag_overflow) { - fpsr |= FPSR_AEXP_OVFL; + fpsr |= FPSR_EXC_OVFL | FPSR_AEXP_OVFL; } if (soft & (float_flag_underflow | float_flag_output_denormal)) { - fpsr |= FPSR_AEXP_UNFL; + fpsr |= FPSR_EXC_UNFL | FPSR_AEXP_UNFL; } if (soft & float_flag_divbyzero) { - fpsr |= FPSR_AEXP_DZ; + fpsr |= FPSR_EXC_DZ | FPSR_AEXP_DZ; } if (soft & float_flag_inexact) { - fpsr |= FPSR_AEXC_INEX; + fpsr |= FPSR_EXC_INEX2 | FPSR_AEXC_INEX; } }