Message ID | 20240909172823.649837-7-richard.henderson@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20710e11e02sm36539875ad.14.2024.09.09.10.28.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Sep 2024 10:28:30 -0700 (PDT) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, daniel@0x0f.com Subject: [PATCH v3 06/26] softfloat: Set QEMU_NO_HARDFLOAT for m68k Date: Mon, 9 Sep 2024 10:28:03 -0700 Message-ID: <20240909172823.649837-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240909172823.649837-1-richard.henderson@linaro.org> References: <20240909172823.649837-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org |
Series |
target/m68k: fpu improvements
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expand
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diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 027a8e576d..0e4ff874e4 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -220,7 +220,7 @@ GEN_INPUT_FLUSH3(float64_input_flush3, float64) * the use of hardfloat, since hardfloat relies on the inexact flag being * already set. */ -#if defined(TARGET_PPC) || defined(__FAST_MATH__) +#if defined(TARGET_M68K) || defined(TARGET_PPC) || defined(__FAST_MATH__) # if defined(__FAST_MATH__) # warning disabling hardfloat due to -ffast-math: hardfloat requires an exact \ IEEE implementation
Like ppc, m68k needs the complete set of exception flags for each instruction, which means that float_flag_inexact will never be set before each instruction. Thus the hardfloat path will not be used, so we improve things by compiling it out. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- fpu/softfloat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)