| Message ID | 20240911052255.1294071-4-zhenzhong.duan@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | intel_iommu: Enable stage-1 translation for emulated device | expand |
On 11/09/2024 07:22, Zhenzhong Duan wrote: > Caution: External email. Do not open attachments or click links, unless this email comes from a known sender and you know the content is safe. > > > Add an new element scalable_mode in IntelIOMMUState to mark scalable > modern mode, this element will be exposed as an intel_iommu property > finally. > > For now, it's only a placehholder and used for address width > compatibility check and block host device passthrough until nesting > is supported. > > Signed-off-by: Yi Liu <yi.l.liu@intel.com> > Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> > --- > include/hw/i386/intel_iommu.h | 1 + > hw/i386/intel_iommu.c | 22 ++++++++++++++++++---- > 2 files changed, 19 insertions(+), 4 deletions(-) > > diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h > index 1eb05c29fc..788ed42477 100644 > --- a/include/hw/i386/intel_iommu.h > +++ b/include/hw/i386/intel_iommu.h > @@ -262,6 +262,7 @@ struct IntelIOMMUState { > > bool caching_mode; /* RO - is cap CM enabled? */ > bool scalable_mode; /* RO - is Scalable Mode supported? */ > + bool scalable_modern; /* RO - is modern SM supported? */ > bool snoop_control; /* RO - is SNP filed supported? */ > > dma_addr_t root; /* Current root table pointer */ > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index e3465fc27d..57c24f67b4 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -3872,7 +3872,13 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, > return false; > } > > - return true; > + if (!s->scalable_modern) { > + /* All checks requested by VTD non-modern mode pass */ > + return true; > + } > + > + error_setg(errp, "host device is unsupported in scalable modern mode yet"); > + return false; > } > > static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int devfn, > @@ -4262,14 +4268,22 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) > } > } > > - /* Currently only address widths supported are 39 and 48 bits */ > if ((s->aw_bits != VTD_HOST_AW_39BIT) && > - (s->aw_bits != VTD_HOST_AW_48BIT)) { > - error_setg(errp, "Supported values for aw-bits are: %d, %d", > + (s->aw_bits != VTD_HOST_AW_48BIT) && > + !s->scalable_modern) { > + error_setg(errp, "%s mode: supported values for aw-bits are: %d, %d", > + s->scalable_mode ? "Scalable legacy" : "Legacy", I think we should be consistent in the way we name things. s/Scalable legacy/Scalable > VTD_HOST_AW_39BIT, VTD_HOST_AW_48BIT); > return false; > } > > + if ((s->aw_bits != VTD_HOST_AW_48BIT) && s->scalable_modern) { > + error_setg(errp, > + "Scalable modern mode: supported values for aw-bits is: %d", > + VTD_HOST_AW_48BIT); > + return false; > + } > + In both conditions, I would rather test the mode first to make the intention clearer. For instance, (s->aw_bits != VTD_HOST_AW_48BIT) && s->scalable_modern would become s->scalable_modern && (s->aw_bits != VTD_HOST_AW_48BIT) Apart from these minor comments, the patch looks good to me > if (s->scalable_mode && !s->dma_drain) { > error_setg(errp, "Need to set dma_drain for scalable mode"); > return false; > -- > 2.34.1 >
>-----Original Message----- >From: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com> >Subject: Re: [PATCH v3 03/17] intel_iommu: Add a placeholder variable for >scalable modern mode > > > >On 11/09/2024 07:22, Zhenzhong Duan wrote: >> Caution: External email. Do not open attachments or click links, unless this >email comes from a known sender and you know the content is safe. >> >> >> Add an new element scalable_mode in IntelIOMMUState to mark scalable >> modern mode, this element will be exposed as an intel_iommu property >> finally. >> >> For now, it's only a placehholder and used for address width >> compatibility check and block host device passthrough until nesting >> is supported. >> >> Signed-off-by: Yi Liu <yi.l.liu@intel.com> >> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> >> --- >> include/hw/i386/intel_iommu.h | 1 + >> hw/i386/intel_iommu.c | 22 ++++++++++++++++++---- >> 2 files changed, 19 insertions(+), 4 deletions(-) >> >> diff --git a/include/hw/i386/intel_iommu.h >b/include/hw/i386/intel_iommu.h >> index 1eb05c29fc..788ed42477 100644 >> --- a/include/hw/i386/intel_iommu.h >> +++ b/include/hw/i386/intel_iommu.h >> @@ -262,6 +262,7 @@ struct IntelIOMMUState { >> >> bool caching_mode; /* RO - is cap CM enabled? */ >> bool scalable_mode; /* RO - is Scalable Mode supported? */ >> + bool scalable_modern; /* RO - is modern SM supported? */ >> bool snoop_control; /* RO - is SNP filed supported? */ >> >> dma_addr_t root; /* Current root table pointer */ >> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c >> index e3465fc27d..57c24f67b4 100644 >> --- a/hw/i386/intel_iommu.c >> +++ b/hw/i386/intel_iommu.c >> @@ -3872,7 +3872,13 @@ static bool vtd_check_hiod(IntelIOMMUState >*s, HostIOMMUDevice *hiod, >> return false; >> } >> >> - return true; >> + if (!s->scalable_modern) { >> + /* All checks requested by VTD non-modern mode pass */ >> + return true; >> + } >> + >> + error_setg(errp, "host device is unsupported in scalable modern mode >yet"); >> + return false; >> } >> >> static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int >devfn, >> @@ -4262,14 +4268,22 @@ static bool >vtd_decide_config(IntelIOMMUState *s, Error **errp) >> } >> } >> >> - /* Currently only address widths supported are 39 and 48 bits */ >> if ((s->aw_bits != VTD_HOST_AW_39BIT) && >> - (s->aw_bits != VTD_HOST_AW_48BIT)) { >> - error_setg(errp, "Supported values for aw-bits are: %d, %d", >> + (s->aw_bits != VTD_HOST_AW_48BIT) && >> + !s->scalable_modern) { >> + error_setg(errp, "%s mode: supported values for aw-bits >are: %d, %d", >> + s->scalable_mode ? "Scalable legacy" : "Legacy", >I think we should be consistent in the way we name things. >s/Scalable legacy/Scalable Will do. >> VTD_HOST_AW_39BIT, VTD_HOST_AW_48BIT); >> return false; >> } >> >> + if ((s->aw_bits != VTD_HOST_AW_48BIT) && s->scalable_modern) { >> + error_setg(errp, >> + "Scalable modern mode: supported values for aw-bits is: %d", >> + VTD_HOST_AW_48BIT); >> + return false; >> + } >> + >In both conditions, I would rather test the mode first to make the >intention clearer. >For instance, > >(s->aw_bits != VTD_HOST_AW_48BIT) && s->scalable_modern > >would become > >s->scalable_modern && (s->aw_bits != VTD_HOST_AW_48BIT) Sure, will do. Thanks Zhenzhong > >Apart from these minor comments, the patch looks good to me > >> if (s->scalable_mode && !s->dma_drain) { >> error_setg(errp, "Need to set dma_drain for scalable mode"); >> return false; >> -- >> 2.34.1 >>
On Wed, Sep 11, 2024 at 1:26 PM Zhenzhong Duan <zhenzhong.duan@intel.com> wrote: > > Add an new element scalable_mode in IntelIOMMUState to mark scalable > modern mode, this element will be exposed as an intel_iommu property > finally. > > For now, it's only a placehholder and used for address width > compatibility check and block host device passthrough until nesting > is supported. > > Signed-off-by: Yi Liu <yi.l.liu@intel.com> > Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> > --- Acked-by: Jason Wang <jasowang@redhat.com> Thanks
diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 1eb05c29fc..788ed42477 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -262,6 +262,7 @@ struct IntelIOMMUState { bool caching_mode; /* RO - is cap CM enabled? */ bool scalable_mode; /* RO - is Scalable Mode supported? */ + bool scalable_modern; /* RO - is modern SM supported? */ bool snoop_control; /* RO - is SNP filed supported? */ dma_addr_t root; /* Current root table pointer */ diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index e3465fc27d..57c24f67b4 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3872,7 +3872,13 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, return false; } - return true; + if (!s->scalable_modern) { + /* All checks requested by VTD non-modern mode pass */ + return true; + } + + error_setg(errp, "host device is unsupported in scalable modern mode yet"); + return false; } static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int devfn, @@ -4262,14 +4268,22 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) } } - /* Currently only address widths supported are 39 and 48 bits */ if ((s->aw_bits != VTD_HOST_AW_39BIT) && - (s->aw_bits != VTD_HOST_AW_48BIT)) { - error_setg(errp, "Supported values for aw-bits are: %d, %d", + (s->aw_bits != VTD_HOST_AW_48BIT) && + !s->scalable_modern) { + error_setg(errp, "%s mode: supported values for aw-bits are: %d, %d", + s->scalable_mode ? "Scalable legacy" : "Legacy", VTD_HOST_AW_39BIT, VTD_HOST_AW_48BIT); return false; } + if ((s->aw_bits != VTD_HOST_AW_48BIT) && s->scalable_modern) { + error_setg(errp, + "Scalable modern mode: supported values for aw-bits is: %d", + VTD_HOST_AW_48BIT); + return false; + } + if (s->scalable_mode && !s->dma_drain) { error_setg(errp, "Need to set dma_drain for scalable mode"); return false;