From patchwork Wed Sep 11 05:22:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Duan, Zhenzhong" X-Patchwork-Id: 13799699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F7F2EE0209 for ; Wed, 11 Sep 2024 05:27:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1soFrm-0001dx-8T; Wed, 11 Sep 2024 01:26:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1soFrj-0001Yb-Rt for qemu-devel@nongnu.org; Wed, 11 Sep 2024 01:26:07 -0400 Received: from mgamail.intel.com ([192.198.163.11]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1soFri-0004Mp-7M for qemu-devel@nongnu.org; Wed, 11 Sep 2024 01:26:07 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1726032366; x=1757568366; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yRJXEvULghdGdFE/Kjm+649W8BclXyUE8cGTIU3m5lc=; b=DKMkloJwCpmCfpTlzoXjIdzQ2r9wY4WF21DsObfhByu7HgNky7XShJB1 02ms+G53feHsLmBZFoHR1MT6m3RA1q9CyLumV1P8B2HZPFo0eDvFOXvqz PhmMUPxYJUbUG9MU3Yjq0rOvwqK/i/iwNoeodm1TTJbTnb6jB85O+JosK zFI7FNwHAfuEOzJff3wJortHl6hYr+Q+ufN1VPoF8b/vNHC1TubSy4INy qztR6D80COtRPttu+AbeFH1cdh20RDkhMikbfCmXGAKQl9C/VUfFk4QhB fc+2fBiFnTMX7OyRXStbi+YTw3a/YMhzrRTN2Ii5qC37U9+s9UCd2a51b A==; X-CSE-ConnectionGUID: OadyJEarS2yaMyt2YaXLEg== X-CSE-MsgGUID: 5zo+pHneRpyxiwwO6LsQlw== X-IronPort-AV: E=McAfee;i="6700,10204,11191"; a="35403489" X-IronPort-AV: E=Sophos;i="6.10,219,1719903600"; d="scan'208";a="35403489" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2024 22:26:06 -0700 X-CSE-ConnectionGUID: 4Ed2/OgfSQO2rccMVHR1cg== X-CSE-MsgGUID: Ddb+p4BdQRi0KA4lVOOGbw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,219,1719903600"; d="scan'208";a="67536401" Received: from spr-s2600bt.bj.intel.com ([10.240.192.127]) by orviesa006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Sep 2024 22:26:01 -0700 From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com, jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost Subject: [PATCH v3 03/17] intel_iommu: Add a placeholder variable for scalable modern mode Date: Wed, 11 Sep 2024 13:22:41 +0800 Message-Id: <20240911052255.1294071-4-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240911052255.1294071-1-zhenzhong.duan@intel.com> References: <20240911052255.1294071-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Received-SPF: pass client-ip=192.198.163.11; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -44 X-Spam_score: -4.5 X-Spam_bar: ---- X-Spam_report: (-4.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.145, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add an new element scalable_mode in IntelIOMMUState to mark scalable modern mode, this element will be exposed as an intel_iommu property finally. For now, it's only a placehholder and used for address width compatibility check and block host device passthrough until nesting is supported. Signed-off-by: Yi Liu Signed-off-by: Zhenzhong Duan Acked-by: Jason Wang --- include/hw/i386/intel_iommu.h | 1 + hw/i386/intel_iommu.c | 22 ++++++++++++++++++---- 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index 1eb05c29fc..788ed42477 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -262,6 +262,7 @@ struct IntelIOMMUState { bool caching_mode; /* RO - is cap CM enabled? */ bool scalable_mode; /* RO - is Scalable Mode supported? */ + bool scalable_modern; /* RO - is modern SM supported? */ bool snoop_control; /* RO - is SNP filed supported? */ dma_addr_t root; /* Current root table pointer */ diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index e3465fc27d..57c24f67b4 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3872,7 +3872,13 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, return false; } - return true; + if (!s->scalable_modern) { + /* All checks requested by VTD non-modern mode pass */ + return true; + } + + error_setg(errp, "host device is unsupported in scalable modern mode yet"); + return false; } static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int devfn, @@ -4262,14 +4268,22 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) } } - /* Currently only address widths supported are 39 and 48 bits */ if ((s->aw_bits != VTD_HOST_AW_39BIT) && - (s->aw_bits != VTD_HOST_AW_48BIT)) { - error_setg(errp, "Supported values for aw-bits are: %d, %d", + (s->aw_bits != VTD_HOST_AW_48BIT) && + !s->scalable_modern) { + error_setg(errp, "%s mode: supported values for aw-bits are: %d, %d", + s->scalable_mode ? "Scalable legacy" : "Legacy", VTD_HOST_AW_39BIT, VTD_HOST_AW_48BIT); return false; } + if ((s->aw_bits != VTD_HOST_AW_48BIT) && s->scalable_modern) { + error_setg(errp, + "Scalable modern mode: supported values for aw-bits is: %d", + VTD_HOST_AW_48BIT); + return false; + } + if (s->scalable_mode && !s->dma_drain) { error_setg(errp, "Need to set dma_drain for scalable mode"); return false;