From patchwork Thu Sep 12 07:39:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierrick Bouvier X-Patchwork-Id: 13801656 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92CDDEE645B for ; Thu, 12 Sep 2024 07:49:37 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1soeSy-00071z-CF; Thu, 12 Sep 2024 03:42:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1soeRo-0007Ge-LH for qemu-devel@nongnu.org; Thu, 12 Sep 2024 03:41:01 -0400 Received: from mail-oi1-x232.google.com ([2607:f8b0:4864:20::232]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1soeRl-0000wC-IZ for qemu-devel@nongnu.org; Thu, 12 Sep 2024 03:40:59 -0400 Received: by mail-oi1-x232.google.com with SMTP id 5614622812f47-3e03d17365bso375531b6e.1 for ; Thu, 12 Sep 2024 00:40:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1726126856; x=1726731656; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BNLX5DGEYX2WSxoAnBw7IllFC2g6NKBNnAohuS36caw=; b=ILYWBDYOk8fuflgQTHpp6jzrz+WtFuy2IzxpITjXNW67CIqREdrhRYY1wtFHmnC9LM PVR534e7fXahidht1FZoPZw0nKFU9SWhUKk+YGGXy5tb81jAvdza/ZUdiFfsSHHB/OBs oPTIws5j+B7TufoOSV9AGk9qm8gmxuqgFeTPVoJx5IQUkmHB2Ae7DB0MNuSEsmIAIR5y 0B4f/Ia+OdYfsvkYnW83qwDxJcInVpV30dAUy02FzDF6BI3fRr2STPvjQXAnVLf1e3W/ QiwKge5oKg71tny+fZqN3PgrdaaaTjVMrGyTUzvr0IZdD0xpVWsFC/X1xqldcQZXsK5T SN+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1726126856; x=1726731656; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BNLX5DGEYX2WSxoAnBw7IllFC2g6NKBNnAohuS36caw=; b=l6orlTva2k3xmlaMoa/uC78gN4yC0LoZEXO9hCUheTDs1UwKM055SxuAeadvl7IjWN ZuEBNUfYKmDNuvv6/mWUF4ZBVLMB043brwcLSZRsTJsj774R7/PEVmhDVT/CYwEdAagq QjlGPYa2UVw7kuGqOLGyXgwuBMEjViclde8VSLy/bFAHHPX/1Dj4YUouP+i+NxoXhda+ mQngZDgeJ+dGKZDFruK6D9IBu8PnOx7QJv5d2mXXrgapuUWTzn2ehvC5HiB9NwP6V1Hu NsF6Sy8C8okVMuHUmlkeqsNFGEs319T/WbmOrPkb+3QZpql/KGFuCemk5JeEy9wKTUME tkmw== X-Gm-Message-State: AOJu0Yz652RmOy5zlGOsThWcm0Mlkpl1GUgbQeND08LtAFv1dGe+7K0A zGVgISy/SiaUvv6uRcuEjDS4AawM+cxEdqnrQbJpQt88imIs+rmcQ7KVaB03ahLzkmzsJjA89mp Z+5bdSSQb X-Google-Smtp-Source: AGHT+IH+4KhzlZ0oxHJ+Uh2bqKlcjrz6JC7PesfrNFsLZGD4kro1D7yoRsRe4Wd9oo4If8anPJmXNQ== X-Received: by 2002:a05:6808:d52:b0:3e0:4aa3:73a4 with SMTP id 5614622812f47-3e071ab4fd3mr991972b6e.16.1726126856074; Thu, 12 Sep 2024 00:40:56 -0700 (PDT) Received: from linaro.vn.shawcable.net ([2604:3d08:9384:1d00::9633]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7db1fb9ad87sm983458a12.6.2024.09.12.00.40.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Sep 2024 00:40:55 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Jason Wang , =?utf-8?q?Alex_Benn=C3=A9e?= , Laurent Vivier , Marcelo Tosatti , Nicholas Piggin , Klaus Jensen , WANG Xuerui , Halil Pasic , Rob Herring , Michael Rolnik , Zhao Liu , Peter Maydell , Richard Henderson , Fabiano Rosas , Corey Minyard , Keith Busch , Thomas Huth , "Maciej S. Szmigiero" , Harsh Prateek Bora , Kevin Wolf , Paolo Bonzini , Jesper Devantier , Hyman Huang , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Palmer Dabbelt , qemu-s390x@nongnu.org, Laurent Vivier , qemu-riscv@nongnu.org, "Richard W.M. Jones" , Liu Zhiwei , Aurelien Jarno , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Marcel Apfelbaum , kvm@vger.kernel.org, Christian Borntraeger , Akihiko Odaki , Daniel Henrique Barboza , Hanna Reitz , Ani Sinha , qemu-ppc@nongnu.org, =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Alistair Francis , Bin Meng , "Michael S. Tsirkin" , Helge Deller , Peter Xu , Daniel Henrique Barboza , Dmitry Fleytman , Nina Schoetterl-Glausch , Yanan Wang , qemu-arm@nongnu.org, Igor Mammedov , Jean-Christophe Dubois , Eric Farman , Sriram Yagnaraman , qemu-block@nongnu.org, Stefan Berger , Joel Stanley , Eduardo Habkost , David Gibson , Fam Zheng , Weiwei Li , Markus Armbruster , Pierrick Bouvier Subject: [PATCH v2 34/48] target/riscv: remove break after g_assert_not_reached() Date: Thu, 12 Sep 2024 00:39:07 -0700 Message-Id: <20240912073921.453203-35-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240912073921.453203-1-pierrick.bouvier@linaro.org> References: <20240912073921.453203-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::232; envelope-from=pierrick.bouvier@linaro.org; helo=mail-oi1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This patch is part of a series that moves towards a consistent use of g_assert_not_reached() rather than an ad hoc mix of different assertion mechanisms. Reviewed-by: Richard Henderson Reviewed-by: Daniel Henrique Barboza Signed-off-by: Pierrick Bouvier --- target/riscv/monitor.c | 1 - target/riscv/insn_trans/trans_rvv.c.inc | 2 -- 2 files changed, 3 deletions(-) diff --git a/target/riscv/monitor.c b/target/riscv/monitor.c index f5b1ffe6c3e..100005ea4e9 100644 --- a/target/riscv/monitor.c +++ b/target/riscv/monitor.c @@ -184,7 +184,6 @@ static void mem_info_svxx(Monitor *mon, CPUArchState *env) break; default: g_assert_not_reached(); - break; } /* calculate virtual address bits */ diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc index 3a3896ba06c..f8928c44a8b 100644 --- a/target/riscv/insn_trans/trans_rvv.c.inc +++ b/target/riscv/insn_trans/trans_rvv.c.inc @@ -3172,7 +3172,6 @@ static void load_element(TCGv_i64 dest, TCGv_ptr base, break; default: g_assert_not_reached(); - break; } } @@ -3257,7 +3256,6 @@ static void store_element(TCGv_i64 val, TCGv_ptr base, break; default: g_assert_not_reached(); - break; } }