| Message ID | 20240916150853.1216703-4-edgar.iglesias@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hw/arm: xenpvh: Enable PCI for ARM PVH | expand |
On Mon, 16 Sep 2024, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.iglesias@amd.com> > > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Acked-by: Stefano Stabellini <sstabellini@kernel.org> > --- > hw/xen/xen-pvh-common.c | 36 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c > index 76a9b2b945..218ac851cf 100644 > --- a/hw/xen/xen-pvh-common.c > +++ b/hw/xen/xen-pvh-common.c > @@ -218,6 +218,11 @@ static void xen_pvh_init(MachineState *ms) > error_report("pci-ecam-size only supports values 0 or 0x10000000"); > exit(EXIT_FAILURE); > } > + if (!s->cfg.pci_intx_irq_base) { > + error_report("PCI enabled but pci-intx-irq-base not set"); > + exit(EXIT_FAILURE); > + } > + > xenpvh_gpex_init(s, xpc, sysmem); > } > > @@ -273,6 +278,30 @@ XEN_PVH_PROP_MEMMAP(pci_ecam) > XEN_PVH_PROP_MEMMAP(pci_mmio) > XEN_PVH_PROP_MEMMAP(pci_mmio_high) > > +static void xen_pvh_set_pci_intx_irq_base(Object *obj, Visitor *v, > + const char *name, void *opaque, > + Error **errp) > +{ > + XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); > + uint32_t value; > + > + if (!visit_type_uint32(v, name, &value, errp)) { > + return; > + } > + > + xp->cfg.pci_intx_irq_base = value; > +} > + > +static void xen_pvh_get_pci_intx_irq_base(Object *obj, Visitor *v, > + const char *name, void *opaque, > + Error **errp) > +{ > + XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); > + uint32_t value = xp->cfg.pci_intx_irq_base; > + > + visit_type_uint32(v, name, &value, errp); > +} > + > void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc) > { > ObjectClass *oc = OBJECT_CLASS(xpc); > @@ -318,6 +347,13 @@ do { \ > OC_MEMMAP_PROP(oc, "pci-ecam", pci_ecam); > OC_MEMMAP_PROP(oc, "pci-mmio", pci_mmio); > OC_MEMMAP_PROP(oc, "pci-mmio-high", pci_mmio_high); > + > + object_class_property_add(oc, "pci-intx-irq-base", "uint32_t", > + xen_pvh_get_pci_intx_irq_base, > + xen_pvh_set_pci_intx_irq_base, > + NULL, NULL); > + object_class_property_set_description(oc, "pci-intx-irq-base", > + "Set PCI INTX interrupt base line."); > } > > #ifdef CONFIG_TPM > -- > 2.43.0 >
diff --git a/hw/xen/xen-pvh-common.c b/hw/xen/xen-pvh-common.c index 76a9b2b945..218ac851cf 100644 --- a/hw/xen/xen-pvh-common.c +++ b/hw/xen/xen-pvh-common.c @@ -218,6 +218,11 @@ static void xen_pvh_init(MachineState *ms) error_report("pci-ecam-size only supports values 0 or 0x10000000"); exit(EXIT_FAILURE); } + if (!s->cfg.pci_intx_irq_base) { + error_report("PCI enabled but pci-intx-irq-base not set"); + exit(EXIT_FAILURE); + } + xenpvh_gpex_init(s, xpc, sysmem); } @@ -273,6 +278,30 @@ XEN_PVH_PROP_MEMMAP(pci_ecam) XEN_PVH_PROP_MEMMAP(pci_mmio) XEN_PVH_PROP_MEMMAP(pci_mmio_high) +static void xen_pvh_set_pci_intx_irq_base(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); + uint32_t value; + + if (!visit_type_uint32(v, name, &value, errp)) { + return; + } + + xp->cfg.pci_intx_irq_base = value; +} + +static void xen_pvh_get_pci_intx_irq_base(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + XenPVHMachineState *xp = XEN_PVH_MACHINE(obj); + uint32_t value = xp->cfg.pci_intx_irq_base; + + visit_type_uint32(v, name, &value, errp); +} + void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc) { ObjectClass *oc = OBJECT_CLASS(xpc); @@ -318,6 +347,13 @@ do { \ OC_MEMMAP_PROP(oc, "pci-ecam", pci_ecam); OC_MEMMAP_PROP(oc, "pci-mmio", pci_mmio); OC_MEMMAP_PROP(oc, "pci-mmio-high", pci_mmio_high); + + object_class_property_add(oc, "pci-intx-irq-base", "uint32_t", + xen_pvh_get_pci_intx_irq_base, + xen_pvh_set_pci_intx_irq_base, + NULL, NULL); + object_class_property_set_description(oc, "pci-intx-irq-base", + "Set PCI INTX interrupt base line."); } #ifdef CONFIG_TPM