Message ID | 20241009033704.250287-3-salil.mehta@huawei.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
Return-Path: <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A6D2CF043B for <qemu-devel@archiver.kernel.org>; Wed, 9 Oct 2024 03:39:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from <qemu-devel-bounces@nongnu.org>) id 1syNX3-0001P0-W0; Tue, 08 Oct 2024 23:38:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <salil.mehta@huawei.com>) id 1syNWz-0001Nj-O9; Tue, 08 Oct 2024 23:38:34 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from <salil.mehta@huawei.com>) id 1syNWy-0006Mq-7S; Tue, 08 Oct 2024 23:38:33 -0400 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4XNdm23Sybz6LDBf; Wed, 9 Oct 2024 11:34:10 +0800 (CST) Received: from frapeml500007.china.huawei.com (unknown [7.182.85.172]) by mail.maildlp.com (Postfix) with ESMTPS id 352F7140447; Wed, 9 Oct 2024 11:38:29 +0800 (CST) Received: from 00293818-MRGF.huawei.com (10.126.173.89) by frapeml500007.china.huawei.com (7.182.85.172) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Wed, 9 Oct 2024 05:38:10 +0200 To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>, <mst@redhat.com> CC: <salil.mehta@huawei.com>, <maz@kernel.org>, <jean-philippe@linaro.org>, <jonathan.cameron@huawei.com>, <lpieralisi@kernel.org>, <peter.maydell@linaro.org>, <richard.henderson@linaro.org>, <imammedo@redhat.com>, <andrew.jones@linux.dev>, <david@redhat.com>, <philmd@linaro.org>, <eric.auger@redhat.com>, <will@kernel.org>, <ardb@kernel.org>, <oliver.upton@linux.dev>, <pbonzini@redhat.com>, <gshan@redhat.com>, <rafael@kernel.org>, <borntraeger@linux.ibm.com>, <alex.bennee@linaro.org>, <npiggin@gmail.com>, <harshpb@linux.ibm.com>, <linux@armlinux.org.uk>, <darren@os.amperecomputing.com>, <ilkka@os.amperecomputing.com>, <vishnu@os.amperecomputing.com>, <karl.heubaum@oracle.com>, <miguel.luis@oracle.com>, <salil.mehta@opnsrc.net>, <zhukeqian1@huawei.com>, <wangxiongfeng2@huawei.com>, <wangyanan55@huawei.com>, <jiakernel2@gmail.com>, <maobibo@loongson.cn>, <lixianglai@loongson.cn>, <shahuang@redhat.com>, <zhao1.liu@intel.com>, <linuxarm@huawei.com>, <gustavo.romero@linaro.org> Subject: [PATCH RFC V4 32/33] hw/intc/arm_gicv3_kvm: Pause all vCPU to ensure locking in KVM of resetting vCPU Date: Wed, 9 Oct 2024 04:37:03 +0100 Message-ID: <20241009033704.250287-3-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241009033704.250287-1-salil.mehta@huawei.com> References: <20241009031815.250096-1-salil.mehta@huawei.com> <20241009033704.250287-1-salil.mehta@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.126.173.89] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To frapeml500007.china.huawei.com (7.182.85.172) Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Reply-to: Salil Mehta <salil.mehta@huawei.com> From: Salil Mehta via <qemu-devel@nongnu.org> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org |
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Support of Virtual CPU Hotplug for ARMv8 Arch
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expand
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diff --git a/hw/intc/arm_gicv3_kvm.c b/hw/intc/arm_gicv3_kvm.c index 3e1e97d830..bcdbf83897 100644 --- a/hw/intc/arm_gicv3_kvm.c +++ b/hw/intc/arm_gicv3_kvm.c @@ -714,10 +714,19 @@ static void arm_gicv3_icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) return; } + /* + * This shall be called even when vcpu is being hotplugged or onlined and + * other vcpus might be running. Host kernel KVM code to handle device + * access of IOCTLs KVM_{GET|SET}_DEVICE_ATTR might fail due to inability to + * grab vcpu locks for all the vcpus. Hence, we need to pause all vcpus to + * facilitate locking within host. + */ + pause_all_vcpus(); /* Initialize to actual HW supported configuration */ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS, KVM_VGIC_ATTR(ICC_CTLR_EL1, c->gicr_typer), &c->icc_ctlr_el1[GICV3_NS], false, &error_abort); + resume_all_vcpus(); c->icc_ctlr_el1[GICV3_S] = c->icc_ctlr_el1[GICV3_NS]; }
vCPU reset can result in device access to VGIC CPU system registers using the `IOCTL KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS` interface. When accessing these registers in the KVM host, it is necessary to acquire a lock on all vCPUs during the `vgic_v3_attr_regs_access()` operation. This operation may fail if KVM is unable to acquire the necessary locks on all vCPUs. Therefore, to ensure proper locking of the vCPU being reset and prevent failures, we need to *pause all vCPUs* during this operation to facilitate successful locking within the host. Signed-off-by: Salil Mehta <salil.mehta@huawei.com> --- hw/intc/arm_gicv3_kvm.c | 9 +++++++++ 1 file changed, 9 insertions(+)