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[77.191.25.143]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a29750a9asm218005766b.88.2024.10.16.14.24.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Oct 2024 14:24:24 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Jason Wang , qemu-arm@nongnu.org, Peter Maydell , Guenter Roeck , Paolo Bonzini , Bernhard Beschow Subject: [PATCH v2 5/5] hw/net/lan9118_phy: Add missing 100 mbps full duplex advertisement Date: Wed, 16 Oct 2024 23:24:07 +0200 Message-ID: <20241016212407.139390-6-shentey@gmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241016212407.139390-1-shentey@gmail.com> References: <20241016212407.139390-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=shentey@gmail.com; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The real device advertises this mode and the device model already advertises 100 mbps half duplex and 10 mbps full+half duplex. So advertise this mode to make the model more realistic. Reviewed-by: Peter Maydell Signed-off-by: Bernhard Beschow --- hw/net/lan9118_phy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/net/lan9118_phy.c b/hw/net/lan9118_phy.c index dafea5a875..5f9737556f 100644 --- a/hw/net/lan9118_phy.c +++ b/hw/net/lan9118_phy.c @@ -149,8 +149,8 @@ void lan9118_phy_write(Lan9118PhyState *s, int reg, uint32_t val) break; case MII_ANAR: s->advertise = (val & (MII_ANAR_RFAULT | MII_ANAR_PAUSE_ASYM | - MII_ANAR_PAUSE | MII_ANAR_10FD | MII_ANAR_10 | - MII_ANAR_SELECT)) + MII_ANAR_PAUSE | MII_ANAR_TXFD | MII_ANAR_10FD | + MII_ANAR_10 | MII_ANAR_SELECT)) | MII_ANAR_TX; break; case 30: /* Interrupt mask */