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[PULL,v2,00/29] Misc HW patches for 2024-11-05

Message ID 20241105233503.56812-1-philmd@linaro.org (mailing list archive)
State New
Headers show

Pull-request

https://github.com/philmd/qemu.git tags/hw-misc-20241105

Message

Philippe Mathieu-Daudé Nov. 5, 2024, 11:35 p.m. UTC
The following changes since commit 44a9394b1d272b53306d097d4bc20ff7ad14b159:

  Merge tag 'pull-nvme-20241104' of https://gitlab.com/birkelund/qemu into staging (2024-11-05 14:23:22 +0000)

are available in the Git repository at:

  https://github.com/philmd/qemu.git tags/hw-misc-20241105

for you to fetch changes up to d37eede7a8e6ff33d21aacb41a68e63e8ffa1d60:

  hw/riscv/iommu: fix build error with clang (2024-11-05 23:32:25 +0000)

----------------------------------------------------------------
Misc HW patch queue

- Deprecate a pair of untested microblaze big-endian machines (Philippe)
- Arch-agnostic CPU topology checks at machine level (Zhao)
- Cleanups on PPC E500 (Bernhard)
- Various conversions to DEFINE_TYPES() macro (Bernhard)
- Fix RISC-V _pext_u64() name clashing (Pierrick)

----------------------------------------------------------------

Bernhard Beschow (17):
  hw/ppc/e500: Prefer QOM cast
  hw/ppc/e500: Remove unused "irqs" parameter
  hw/ppc/e500: Add missing device tree properties to i2c controller node
  hw/ppc/mpc8544_guts: Populate POR PLL ratio status register
  hw/i2c/mpc_i2c: Convert DPRINTF to trace events for register access
  hw/i2c/mpc_i2c: Prefer DEFINE_TYPES() macro
  hw/pci-host/ppce500: Reuse TYPE_PPC_E500_PCI_BRIDGE define
  hw/pci-host/ppce500: Prefer DEFINE_TYPES() macro
  hw/net/fsl_etsec/miim: Reuse MII constants
  hw/net/fsl_etsec/etsec: Prefer DEFINE_TYPES() macro
  hw/gpio/mpc8xxx: Prefer DEFINE_TYPES() macro
  hw/ppc/mpc8544_guts: Prefer DEFINE_TYPES() macro
  hw/sd/sdhci: Prefer DEFINE_TYPES() macro
  hw/block/pflash_cfi01: Prefer DEFINE_TYPES() macro
  hw/i2c/smbus_eeprom: Prefer DEFINE_TYPES() macro
  hw/rtc/ds1338: Prefer DEFINE_TYPES() macro
  hw/usb/hcd-ehci-sysbus: Prefer DEFINE_TYPES() macro

Philippe Mathieu-Daudé (6):
  target/microblaze: Alias CPU endianness property as 'little-endian'
  hw/microblaze: Deprecate big-endian petalogix-ml605 & xlnx-zynqmp-pmu
  hw/microblaze/s3adsp1800: Explicit CPU endianness
  hw/microblaze/s3adsp1800: Rename unimplemented MMIO region as xps_gpio
  hw/microblaze/s3adsp1800: Declare machine type using DEFINE_TYPES
    macro
  hw/core/machine: Add missing 'units.h' and 'error-report.h' headers

Pierrick Bouvier (1):
  hw/riscv/iommu: fix build error with clang

Zhao Liu (5):
  i386/cpu: Don't enumerate the "invalid" CPU topology level
  hw/core: Make CPU topology enumeration arch-agnostic
  qapi/qom: Define cache enumeration and properties for machine
  hw/core: Check smp cache topology support for machine
  hw/core: Add a helper to check the cache topology level

 docs/about/deprecated.rst                     |   6 +
 .../devices/microblaze-softmmu/default.mak    |   2 -
 .../devices/microblazeel-softmmu/default.mak  |   5 +-
 qapi/machine-common.json                      |  94 ++++++++++-
 include/hw/boards.h                           |  16 ++
 include/hw/i386/topology.h                    |  22 +--
 target/i386/cpu.h                             |   4 +-
 hw/block/pflash_cfi01.c                       |  21 +--
 hw/core/machine-smp.c                         | 126 +++++++++++++++
 hw/core/machine.c                             |  46 ++++++
 hw/gpio/mpc8xxx.c                             |  22 ++-
 hw/i2c/mpc_i2c.c                              |  29 ++--
 hw/i2c/smbus_eeprom.c                         |  19 +--
 hw/i386/x86-common.c                          |   4 +-
 hw/microblaze/petalogix_ml605_mmu.c           |   9 +-
 hw/microblaze/petalogix_s3adsp1800_mmu.c      |  21 ++-
 hw/microblaze/xlnx-zynqmp-pmu.c               |  10 +-
 hw/net/fsl_etsec/etsec.c                      |  22 ++-
 hw/net/fsl_etsec/miim.c                       |  19 +--
 hw/pci-host/ppce500.c                         |  44 +++--
 hw/ppc/e500.c                                 |  10 +-
 hw/ppc/mpc8544_guts.c                         |  32 ++--
 hw/riscv/riscv-iommu.c                        |  23 ++-
 hw/rtc/ds1338.c                               |  20 +--
 hw/sd/sdhci.c                                 |  62 +++----
 hw/usb/hcd-ehci-sysbus.c                      | 118 ++++++--------
 target/i386/cpu.c                             | 151 +++++++++---------
 target/microblaze/cpu.c                       |  10 ++
 hw/i2c/trace-events                           |   5 +
 29 files changed, 625 insertions(+), 347 deletions(-)

Comments

Peter Maydell Nov. 6, 2024, 9:27 p.m. UTC | #1
On Tue, 5 Nov 2024 at 23:35, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> The following changes since commit 44a9394b1d272b53306d097d4bc20ff7ad14b159:
>
>   Merge tag 'pull-nvme-20241104' of https://gitlab.com/birkelund/qemu into staging (2024-11-05 14:23:22 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/philmd/qemu.git tags/hw-misc-20241105
>
> for you to fetch changes up to d37eede7a8e6ff33d21aacb41a68e63e8ffa1d60:
>
>   hw/riscv/iommu: fix build error with clang (2024-11-05 23:32:25 +0000)
>
> ----------------------------------------------------------------
> Misc HW patch queue
>
> - Deprecate a pair of untested microblaze big-endian machines (Philippe)
> - Arch-agnostic CPU topology checks at machine level (Zhao)
> - Cleanups on PPC E500 (Bernhard)
> - Various conversions to DEFINE_TYPES() macro (Bernhard)
> - Fix RISC-V _pext_u64() name clashing (Pierrick)
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2
for any user-visible changes.

-- PMM