@@ -647,8 +647,6 @@ static void create_pcie(SBSAMachineState *sms)
int i;
dev = qdev_new(TYPE_GPEX_HOST);
- object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
- true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
/* Map ECAM space */
@@ -898,7 +896,6 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n2");
mc->valid_cpu_types = valid_cpu_types;
mc->max_cpus = 512;
- mc->pci_allow_0_address = true;
mc->minimum_page_bits = 12;
mc->block_default_type = IF_IDE;
mc->no_cdrom = 1;
@@ -1510,8 +1510,6 @@ static void create_pcie(VirtMachineState *vms)
MachineClass *mc = MACHINE_GET_CLASS(ms);
dev = qdev_new(TYPE_GPEX_HOST);
- object_property_set_bool(OBJECT(dev), "refuse-bar-at-addr-0",
- true, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
@@ -3126,7 +3124,6 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
#endif
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
- mc->pci_allow_0_address = true;
/* We know we will never create a pre-ARMv7 CPU which needs 1K pages */
mc->minimum_page_bits = 12;
mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;
ARM virt and sbsa-ref machines set MachineClass::pci_allow_0_address (see commit 74de8c3568 "hw/arm/virt: Allow zero address for PCI IO space"), directly create the GPEX host bridge using the default 'false' value of the "refuse-bar-at-addr-0" property. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/arm/sbsa-ref.c | 3 --- hw/arm/virt.c | 3 --- 2 files changed, 6 deletions(-)