@@ -168,6 +168,7 @@ void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg);
void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg);
int get_fp_bit(int cc);
+void gen_li(DisasContext *ctx, int rd, int imm);
void gen_lx(DisasContext *ctx, int rd, int base, int index, MemOp mop);
void gen_ldxs(DisasContext *ctx, int base, int index, int rd);
void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp);
new file mode 100644
@@ -0,0 +1,21 @@
+/*
+ * MIPS emulation for QEMU - computational translation routines
+ *
+ * Copyright (c) 2021 Philippe Mathieu-Daudé <f4bug@amsat.org>
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "translate.h"
+
+/* logical instructions */
+
+void gen_li(DisasContext *ctx, int rd, int imm)
+{
+ if (rd == 0) {
+ /* Treat as NOP. */
+ return;
+ }
+ tcg_gen_movi_tl(cpu_gpr[rd], imm);
+}
@@ -18,6 +18,7 @@ gen = [
mips_ss.add(gen)
mips_ss.add(files(
+ 'comput_translate.c',
'dsp_helper.c',
'exception.c',
'fpu_helper.c',
gen_li() is the trivial 'Load Immediate' instruction. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/mips/tcg/translate.h | 1 + target/mips/tcg/comput_translate.c | 21 +++++++++++++++++++++ target/mips/tcg/meson.build | 1 + 3 files changed, 23 insertions(+) create mode 100644 target/mips/tcg/comput_translate.c