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[176.184.14.96]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434aa7e33afsm19165815e9.36.2024.11.27.04.17.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 27 Nov 2024 04:17:21 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Anton Johansson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 4/6] include: Expose QemuArch in 'qemu/arch_id.h' Date: Wed, 27 Nov 2024 13:16:56 +0100 Message-ID: <20241127121658.88966-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241127121658.88966-1-philmd@linaro.org> References: <20241127121658.88966-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org While QEMU architecture bitmask values are only used by system emulation code, they can be used in generic code like TCG accelerator. Move the declarations to "qemu/arch_id.h" and add the QemuArch type definition. Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/arch_id.h | 28 ++++++++++++++++++++++++++++ include/sysemu/arch_init.h | 28 +++------------------------- 2 files changed, 31 insertions(+), 25 deletions(-) create mode 100644 include/qemu/arch_id.h diff --git a/include/qemu/arch_id.h b/include/qemu/arch_id.h new file mode 100644 index 00000000000..e3e8cf5e724 --- /dev/null +++ b/include/qemu/arch_id.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef QEMU_ARCH_ID_H +#define QEMU_ARCH_ID_H + +typedef enum QemuArch { /* FIXME this is not an enum */ + QEMU_ARCH_ALL = -1, + QEMU_ARCH_ALPHA = (1 << 0), + QEMU_ARCH_ARM = (1 << 1), + QEMU_ARCH_I386 = (1 << 3), + QEMU_ARCH_M68K = (1 << 4), + QEMU_ARCH_MICROBLAZE = (1 << 6), + QEMU_ARCH_MIPS = (1 << 7), + QEMU_ARCH_PPC = (1 << 8), + QEMU_ARCH_S390X = (1 << 9), + QEMU_ARCH_SH4 = (1 << 10), + QEMU_ARCH_SPARC = (1 << 11), + QEMU_ARCH_XTENSA = (1 << 12), + QEMU_ARCH_OPENRISC = (1 << 13), + QEMU_ARCH_TRICORE = (1 << 16), + QEMU_ARCH_HPPA = (1 << 18), + QEMU_ARCH_RISCV = (1 << 19), + QEMU_ARCH_RX = (1 << 20), + QEMU_ARCH_AVR = (1 << 21), + QEMU_ARCH_HEXAGON = (1 << 22), + QEMU_ARCH_LOONGARCH = (1 << 23), +} QemuArch; + +#endif diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h index 5b1c1026f3a..01106de5bcb 100644 --- a/include/sysemu/arch_init.h +++ b/include/sysemu/arch_init.h @@ -1,29 +1,7 @@ -#ifndef QEMU_ARCH_INIT_H -#define QEMU_ARCH_INIT_H +#ifndef SYSEMU_ARCH_INIT_H +#define SYSEMU_ARCH_INIT_H - -enum { - QEMU_ARCH_ALL = -1, - QEMU_ARCH_ALPHA = (1 << 0), - QEMU_ARCH_ARM = (1 << 1), - QEMU_ARCH_I386 = (1 << 3), - QEMU_ARCH_M68K = (1 << 4), - QEMU_ARCH_MICROBLAZE = (1 << 6), - QEMU_ARCH_MIPS = (1 << 7), - QEMU_ARCH_PPC = (1 << 8), - QEMU_ARCH_S390X = (1 << 9), - QEMU_ARCH_SH4 = (1 << 10), - QEMU_ARCH_SPARC = (1 << 11), - QEMU_ARCH_XTENSA = (1 << 12), - QEMU_ARCH_OPENRISC = (1 << 13), - QEMU_ARCH_TRICORE = (1 << 16), - QEMU_ARCH_HPPA = (1 << 18), - QEMU_ARCH_RISCV = (1 << 19), - QEMU_ARCH_RX = (1 << 20), - QEMU_ARCH_AVR = (1 << 21), - QEMU_ARCH_HEXAGON = (1 << 22), - QEMU_ARCH_LOONGARCH = (1 << 23), -}; +#include "qemu/arch_id.h" extern const uint32_t arch_type;